Solid-State Devices TRIZ Cases

Graded sealing resin elasticity and constrained wire paths prevent breakage caused by thermal expansion mismatch.

A hydrophobic organic layer serves as the outermost encapsulation barrier on an organic light emitting display unit.

A doped band in the substrate shields high-voltage SOI devices through buried oxide contacts.

A semi-floating-gate gallium nitride device uses a diode and capacitor to control the gate terminal.

A backside-illuminated image sensor employs a metal grid to induce charge recombination with substrate defects, reducing dark current.

A resistive memory electrode uses localized thickness reduction to concentrate Joule heating above the variable resistance material layer.

A U-shaped chalcogenide material enables self-heating for phase change memory cells.

A mask layout design method arranges semiconductor cells with specific well boundary distances to ensure uniform transistor characteristics across the array.

A transmissive pattern with matched refractive indices minimizes light refraction at the microlens interface.

A laser-patterning process creates metal gates on dielectric films to manufacture thin film transistors.

Residual insulating layer protects lower contact holes from damage during overlapping formation, enabling higher pixel density.

Merging multiple masks into one reduces manufacturing costs while maintaining pattern formation precision for three-dimensional devices.

Etched channel notches and capping layers separate lateral edges in a 3D memory ridge stack, preventing corner effect degradation.

A semiconductor memory device featuring a double channel structure with nested inner and outer layers.

Segmented electrodes prevent polarization reversal during read operations, maintaining non-volatile memory states without data loss.

A continuous second electrode extends across the substrate to reduce bezel size.

Circular ferroelectric gate structure minimizes edge-driven depolarization fields, reducing electrical parameter variation and enhancing device reliability.

Dual separators guide signal charges into the multiplication region, suppressing outflow and intrusion to enhance photon detection efficiency.

An RGBW system adds a white subpixel to boost non-saturated color brightness while gamut mapping algorithms maintain hue accuracy.

Segmenting large metal particles into a two-dimensional assembly resolves weak emission enhancement by generating intense localized plasmon resonance.

A semi-polar nitride-based light emitting diode structure mitigates efficiency droop and non-uniform emission during high-power operation.

Recessing the memory area substrate matches cell heights to logic devices, reducing leakage during integration.

A thin film transistor array substrate uses a multi-level resist pattern to define gate lines, data lines, and electrodes in a single photolithography step.

Grooves between organic light emitting diode sub-pixels block stray light pathways, preventing blurring and ghosting to improve contrast ratio.

Conductive layers absorb laser heat within sealing area openings to ensure uniform hardening of the sealing member, preventing substrate separation.

Slope-etched photoresist patterns increase gate capacitance, resolving the trade-off between manufacturing precision and production yield.

A staggered collimation hole and electrode via arrangement simplifies array substrate fabrication for under-screen fingerprint recognition.

Vertical wire separation via an anti-burning insulation layer prevents short-circuits and heat generation between overlapping Vss and Vdd lines.

Dome patterns with distinct refractive indices correct lateral viewing color deviation by adjusting the optical path of emitted light.

Active semiconductor sinks absorb heat from the OLED panel and dissipate it via a dedicated unit, reducing thermal buildup in compact foldable structures.

A support element and sealant restore encapsulation integrity around a pass-through hole, preventing moisture ingress that degrades internal layers.

Selective wet etching removes the sacrificial metal supply layer to eliminate dry-etch contamination and boost throughput.

Adjusting hole-blocking and electron-transporting layer thicknesses optimizes emission efficiency while maintaining low driving voltage and power consumption.

Coplanar counter-electrodes on a support substrate reduce device complexity while maintaining electrostatic control over the conduction channel.

Weighing phosphoric acid solution detects silicon nitride etching end points, preventing over-etching damage to non-sacrificial materials.

Vertical memory cell strings separated by a slit trench filled with an insulating layer resolve the contradiction between data storage capacity and device size.

Selective epitaxial growth forms vertical semiconductor channels with large grain sizes in 3D NAND memory devices.

Auxiliary electrode formation via magnetic particle placement reduces cathode resistance in organic light emitting displays.

Integrating two back plates into one substrate eliminates bonding steps, reducing thickness and manufacturing complexity.

A phase-change memory cell detects unauthorized optical energy by changing its physical state to trigger electrical security actions.

Doped zirconium oxide films stabilize the tetragonal phase to deliver dielectric constants exceeding 40.

A p+Bpnn+ barrier infrared detector structure uses graded-gap transitions to enhance quantum efficiency.

De-Q circuitry and a cascode device protect RFIC input devices from electrostatic discharge without degrading input match, noise figure, or linearity.

Dual-surface microchip pads connect to substrate wiring, reducing TFT area and improving display aperture ratio.

A thick gate insulation layer forms on an SOI substrate to support high-voltage transistor operation.

An ultra-thin conductive layer mitigates surface charge on MEMS sensors while preserving mechanical flexibility and optical transmission.

Intersecting frame segments and laser reference marks prevent mask sagging during display device manufacturing.

Hollow, symmetrical electrode blocks enable self-capacitive sensing using a single metal layer, reducing mask processes from four to two.