3D Memory Channel Dielectric Stack for Durable High-Density NAND
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Solution Overview
Problem
Two-dimensional semiconductor memory devices face limitations in cost savings due to the high cost of equipment required for forming fine patterns, limiting the degree of integration and thus the performance and affordability of electronic devices.
Innovation Solution
The development of three-dimensional semiconductor memory devices with a substrate, mold structure, and channel structure comprising semiconductor patterns and dielectric films with specific crystalline materials and impurities, enhancing durability and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If two-dimensional semiconductor memory devices use fine pattern formation techniques to increase integration density, then the degree of integration improves, but manufacturing cost increases due to high-priced equipment requirements
Solution Approach 1:
The patent transitions from two-dimensional planar memory cells to three-dimensional vertically stacked memory cells. The mold structure with alternating gate electrodes and insulating films creates a vertical stacking architecture where memory cells are arranged in multiple layers along the vertical direction, enabling higher integration density without requiring finer lateral patterning that would demand expensive equipment
2Reliability
If three-dimensional semiconductor memory devices use complex crystalline film structures with multiple layers and impurities to improve durability, then reliability improves, but device complexity increases
Solution Approach 1:
The patent employs composite crystalline film structures where each crystalline film contains a matrix material combined with specific impurities (e.g., HfO2 with Al2O3 and SiO2, Ta2O5 with Al2O3). These composite materials provide enhanced durability and reliability through the synergistic effects of the matrix and impurity components, while the systematic use of such composites across multiple films manages the overall device complexity
3Reliability
If three-dimensional semiconductor memory devices use multiple crystalline films with different matrices and impurities to enhance durability, then reliability improves, but manufacturing process complexity increases
Solution Approach 1:
The patent systematically varies material parameters across different crystalline films to achieve durability enhancement. Each crystalline film has specific matrix compositions and impurity concentrations optimized for its position and function within the device. This parameter-based differentiation allows tailored performance optimization while maintaining a systematic manufacturing approach that manages process complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the durability and reliability of semiconductor memory devices, enabling higher integration density and cost-effective production, addressing the limitations of two-dimensional devices.
Implementation Method 1
the first crystalline film includes a first matrix and a first impurity, wherein the second crystalline film includes a second matrix and a second impurity
Data Source
AI summary
A semiconductor memory device comprises, a substrate, a mold structure including gate electrodes and mold insulating films alternately stacked on the substrate, and a channel structure penetrating the mold structure, wherein the channel structure comprises a semiconductor pattern and a dielectric film on the semiconductor pattern, wherein the dielectric film comprises a first crystalline film in contact with the gate electrodes and a second crystalline film between the first crystalline film and the semiconductor pattern, wherein the first crystalline film includes a first matrix and a first impurity and the second crystalline film includes a second matrix and a second impurity, wherein each of the first matrix and the second matrix comprises at least one of HfO2, HfxZr1-xO2 (0.5<x<1) and Hf1-yZryO2 (0.5<y<1), and wherein each of the first impurity and the second impurity is 10 at % or less of the first crystalline film and second crystalline film, respectively.