3D Semiconductor Memory Device Electrode Integration
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Solution Overview
Problem
Two-dimensional semiconductor devices face limitations in integration due to the fineness of pattern formation, which restricts their ability to meet increasing performance and cost requirements, prompting the development of three-dimensional semiconductor memory devices with enhanced reliability and integration.
Innovation Solution
A three-dimensional semiconductor memory device design featuring a substrate with a cell array region and connection region, including vertically stacked electrodes, electrode separation structures, and contact plugs arranged in specific distances and configurations to increase integration and reliability, with dummy vertical structures and connection lines enhancing the connection between electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If two-dimensional or planar semiconductor devices are used, then manufacturing process is simpler, but integration is limited due to pattern fineness constraints
Solution Approach 1:
The patent transitions from two-dimensional planar semiconductor devices to three-dimensional vertically stacked electrode structures. Multiple electrodes are stacked in the vertical direction (third direction) to increase integration density without requiring finer lateral patterning, thereby overcoming the limitations of two-dimensional devices while maintaining manufacturing feasibility
2Quantity of substance
If three-dimensional vertically stacked electrodes are implemented, then integration is increased, but device complexity increases
Solution Approach 1:
The patent divides the three-dimensional electrode structure into multiple discrete electrode segments stacked vertically. Each electrode can be independently formed and controlled, allowing complex 3D functionality to be achieved through modular assembly of simpler components rather than monolithic complex structures
Solution Approach 2:
The vertically stacked electrode structure serves multiple functions simultaneously: it increases integration density, provides separate control terminals for different electrode layers, enables independent programming and reading of memory cells, and maintains compatibility with existing semiconductor manufacturing processes
3Manufacturing precision
If contact plugs are positioned closer to electrode separation structures, then manufacturing precision requirements are reduced, but reliability decreases due to insufficient process margins
Solution Approach 1:
The patent employs asymmetric positioning of contact plugs relative to electrode separation structures. Different contact plugs are positioned at different distances from adjacent separation structures, creating unequal process margins that are optimized for each specific connection. This asymmetric arrangement allows some contacts to have larger margins for higher reliability while others can be positioned more efficiently for manufacturing
Data Source
AI summary
A three-dimensional semiconductor memory device includes a substrate, an electrode structure including electrodes vertically stacked on the substrate and each having a pad portion, electrode separation structures penetrating the electrode structure and apart from each other in a second direction, and contact plugs coupled to the pad portions. The contact plugs comprise first contact plugs and second contact plugs apart in the second direction from the first contact plugs. The electrode separation structures comprise a first electrode separation between the first and second contact plugs. The first contact plugs are apart in the second direction at a first distance from the first electrode separation structure. The second contact plugs are apart in the second direction from the first electrode separation structure at a second distance, different from the first distance.