Solid-State Devices TRIZ Cases

High-concentration impurity diffusion layers in discrete capacitors minimize capacitance variation under DC bias, enhancing reliability.

Three-dimensional semiconductor memory devices stack electrodes vertically to increase integration density while maintaining manufacturing feasibility.

An additional semiconductor layer protects the body during production while increasing quantization energy to reduce light absorption.

A photodetector circuit stores electric charges in a capacitor to set the current output transistor gate potential.

A GH61 polypeptide and liquor composition enhance cellulolytic enzyme hydrolysis of cellulosic materials.

A multicomponent TTA-UC system uses acceptors as both matrix and annihilator to enable efficient solid-state luminescence.

Dual gate electrodes reduce threshold voltage variation in oxide semiconductor TFTs, improving electrical reliability.

Distinct conductivity types in segmented write and read regions reduce gate leakage current, improving program property reliability in OTP memory devices.

A light emitting apparatus combines devices with complementary color deviations to achieve target chromaticity.

Wider asymmetric sidewall spacers restore charge-trapping capability lost when dielectric widths shrink below 15 nm.

Sacrificial bridging material prevents opening widening and electrode toppling during high aspect ratio etching.

An absorbing layer between the photodetection region and interference filter blocks parasitic infrared radiations, improving visible and depth image quality.

Laminated semiconductor structure integrates P-type wire layer with N-type contact hole to form stable memory cell diodes.

Spacing the resistance switching layer above the barrier layer eliminates insulation sensitivity issues and widens the SET/RESET sensing window.

Gapfill films protect storage node oxide from etchant penetration, preventing bunker defects in cylindrical capacitors.

Vertical multi-batch perpendicular magnetic annealing systems stack workpiece boats to increase throughput while maintaining a compact footprint.

Overlapping first and second metal layers in a double layer metal power MOSFET structure.

Segmented dual emission layers with higher mobility second compound narrow exciton recombination zone to boost luminescence efficiency.

A manufacturing method applies a dual barrier layer to protect copper interconnects from oxidation and ion diffusion, reducing RC delay.

A malleable metal sensor electrode deforms elastically under external pressure to maintain electrical connectivity on thin film transistor substrates.

A common layer in an OLED display uses energy ray irradiation to reduce electrical conductivity between adjacent pixel electrodes.

A one-transistor-one-resistor-one-capacitor memory cell integrates a capacitor to enable fast program and erase speeds alongside data retention.

A display substrate uses electrochemical deposition to form electrode blocks and electrochromic layers on a base.

An auxiliary electrode in a display device reduces electrical resistance via a through hole connecting to a common electrode.

Enlarged trench area in SOI transistor apparatus reduces thermal resistance, mitigating thermally induced offsets without compromising electrical isolation.

A dual-layer gas barrier substrate uses inorganic films to block moisture and oxygen, preventing flexible display aging.

A block pattern modulates incident laser radiation to disperse thermal energy across an OLED sealing member during curing.

Silicon nitride passivation on an AlGaN barrier prevents power degradation in GaN transistors during high temperature reverse bias testing.

Partition concave spaces with dams to isolate ink ejection points near bank defects, preventing color mixture from collapsed banks.

Active bridging chiplets offload communication circuitry to underlying dies, eliminating wasted real estate on advanced process node devices.

A polycrystalline silicon-germanium channel region with a two-step anneal process enhances carrier mobility and reduces off-current in thin film transistors.

High mobility oxide semiconductor active layer reduces spliced bezel width and manufacturing steps for large size Micro-LED displays.

Segmented cathode regions prevent continuous moisture paths that degrade reliability in flexible displays.

A two-step photolithography method for active array substrates using sequential photoresist patterning.

An encapsulation layer seals microcavities in a single-substrate display, preventing contact between the liquid crystal and color filter layers.

A surface layer with higher dopant concentration catalyzes epitaxial growth on inclined facets.

A light-emitting layer uses thermally activated delayed fluorescence to balance charge carriers.

ALD high-k dielectric passivates exposed sidewalls of hetero-junction phototransistors to suppress dark current noise and improve device uniformity.

Fiber optic face plate transfers visible light from scintillating layer to image sensor array while physically blocking X-ray exposure.

Segmenting the electrode with a thermal barrier confines heat in the active region, reducing peak reset current by 10x.

Alternating titanium and nickel layers block tin diffusion, preventing electrode deformation and passivation film peeling.

A gate stack integrates a p-doped semiconductor element and dielectric layer to reduce gate leakage current in high-electron-mobility transistors.

Multi-layer capping structures with graded refractive indices resolve color-shift and low extraction efficiency in OLED displays.

Angled metallic conductors with semi-elliptical reflecting portions redirect light beams within the LED package structure.

Merging conductive layers controls back-gate voltages, eliminating extra contacts and reducing device area.

An OLED substrate pattern opening area with an inward contraction structure aligns the light-emitting layer during evaporation.

Segmented ESD diodes on isolated voltage rails divert high currents to clamps, resolving the trade-off between protection reliability and circuit speed.

Alternating barrier and nanorod optical modulation layers mitigate micro-cavity effects to improve contrast ratio.

Wavelength conversion layers with tapered side surfaces and light-transmitting adhesive improve light extraction efficiency in multi-element arrays.