Multi-die Package Active Bridging Chiplets

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Solution Overview

Problem

Current electronic packaging architectures with disaggregated chiplets face inefficiencies due to the need for extensive communication circuitry on each chiplet, leading to wasted space, power consumption, and limited channel lengths, as existing solutions rely on passive bridges and base dies that do not effectively offload active communication functionality.

Innovation Solution

Implementing a die module architecture where communication functionality, including mesh stops and fabric interfaces, is offloaded to underlying communication dies or hub dies, which include active circuitry, allowing for high-density interconnects and reduced signal path lengths, thereby preserving space on overlying dies and enhancing performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If active communication circuitry is provided on each chiplet, then die-to-die connections can be established, but valuable real estate on advanced process node devices is wasted

Engineering Contradiction:
Improvedie-to-die connection capabilityVSAvoidchiplet real estate
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts active communication circuitry (transmitters, receivers, clocking circuits, routing channels, and power delivery units) from the chiplets and relocates it to dedicated communication dies. This extraction eliminates the waste of valuable real estate on advanced process node chiplets while maintaining full die-to-die connection capability through the separated communication infrastructure.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If passive embedded bridges are used to connect chiplets, then connections between individual chiplets are provided, but active circuitry remains on chiplets resulting in wasted space and power penalties

Engineering Contradiction:
Improvechiplet interconnectionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts active communication circuitry from chiplets and places it on dedicated communication dies, eliminating the power penalties associated with having active circuitry on each chiplet. The passive embedded bridges remain for structural connection while the active functions are consolidated elsewhere.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces dedicated communication dies as intermediary elements between chiplets. These communication dies serve as mediators that handle all active communication functions, allowing chiplets to remain simple compute elements without wasted power or space on communication circuitry.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Area of stationary object

If channels are offloaded from chiplets to base die, then connections between chiplets are established, but active circuitry is still provided on overlying chiplets

Engineering Contradiction:
Improvechiplet real estateVSAvoidactive circuitry distribution
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent completely extracts active communication circuitry from chiplets and relocates it to dedicated communication dies, rather than merely offloading channels to the base die. This full extraction reduces device complexity by consolidating all active communication functions in specialized units rather than distributing them across multiple components.

Inventive Principle:
Principle #2Taking out (Extraction)

4Adaptability or versatility

If disaggregated chiplet architecture is used, then die size limitations and process capabilities are addressed, but extensive communication circuitry is needed on each chiplet

Engineering Contradiction:
Improvedie size flexibilityVSAvoidcommunication circuitry power
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts communication circuitry from disaggregated chiplets and consolidates it on dedicated communication dies, maintaining the flexibility and modularity benefits of chiplet architecture while eliminating the power consumption penalty of having extensive communication circuitry on each small die.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent creates universal communication dies that can serve multiple chiplets, providing a shared communication infrastructure that reduces total power consumption compared to having dedicated communication circuitry on each individual chiplet.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP4148788A1Multi-die package with plural meshed first dies and active bridging chiplets
Publication Date: 2023.03.15 INTEL CORP
  • EP4148788A1 patent drawingFigure 1A
  • EP4148788A1 patent drawingFigure 1B
  • EP4148788A1 patent drawingFigure 2A

AI summary

Embodiments disclosed herein include die modules. In an embodiment, a die module comprises a plurality of first dies, and a second die under the plurality of first dies. In an embodiment, the second die is coupled to individual ones of the plurality of first dies. In an embodiment, the second die comprises a plurality of mesh stops, and conductive routing to electrically couple the mesh stops together.