One-Terminal Memory Cell with Capacitor for Phase Change

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Solution Overview

Problem

Phase change based memory circuits face performance limitations such as slow set speed, high reset current, and limited cycle endurance, making them unsuitable for high-speed random access memory, necessitating the integration of multiple memory types within integrated circuits, which complicates design and increases complexity.

Innovation Solution

A memory cell comprising a transistor, a capacitor, and a programmable resistance memory element that allows for both volatile and nonvolatile modes of operation, enabling fast program/erase speed and data retention, and enabling direct data transfer between the memory element and capacitor without read operations, thus addressing different memory performance requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If phase change based memory circuits are used, then nonvolatile data storage is achieved, but set speed is slow and reset current is high

Engineering Contradiction:
Improvedata retentionVSAvoidset speed
Core Design Contradiction:
Duration of action of stationary objectVSSpeed

Solution Approach 1:

The memory cell is segmented into two distinct storage components: a capacitor for volatile storage and a programmable resistance memory element for nonvolatile storage. This segmentation allows each component to optimize its own performance characteristics - the capacitor provides fast write speeds while the memory element provides data retention, resolving the contradiction between speed and durability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory cell achieves multi-functionality by combining both volatile and nonvolatile storage capabilities in a single cell structure. The capacitor handles high-speed data operations while the programmable resistance element provides nonvolatile retention, allowing the system to fulfill multiple memory performance requirements simultaneously without needing separate memory types.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Duration of action of stationary object

If phase change based memory circuits are used, then nonvolatile data storage is achieved, but cycle endurance is limited

Engineering Contradiction:
Improvedata retentionVSAvoidcycle endurance
Core Design Contradiction:
Duration of action of stationary objectVSReliability

Solution Approach 1:

The memory cell is segmented into two distinct storage components: a capacitor for volatile storage and a programmable resistance memory element for nonvolatile storage. This segmentation allows each component to optimize its own performance characteristics - the capacitor provides fast write speeds while the memory element provides data retention, resolving the contradiction between speed and durability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system uses itself to transfer data between storage modes. The memory cell can autonomously transfer data between the capacitor and programmable resistance element through bias arrangements without external intervention, allowing the same cell to serve both volatile and nonvolatile functions, thereby improving reliability through self-managed data preservation.

Inventive Principle:
Principle #25Self-service

3Adaptability or versatility

If multiple memory types are integrated within integrated circuits, then different memory performance requirements are met, but design complexity increases

Engineering Contradiction:
Improvememory performance requirementsVSAvoiddesign complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The memory cell achieves multi-functionality by combining both volatile and nonvolatile storage capabilities in a single cell structure. The capacitor handles high-speed data operations while the programmable resistance element provides nonvolatile retention, allowing the system to fulfill multiple memory performance requirements simultaneously without needing separate memory types.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The invention merges previously separate volatile and nonvolatile memory functions into a single integrated memory cell. By combining the capacitor and programmable resistance memory element in one cell with shared access transistors and interconnects, the design reduces the number of separate memory blocks needed, thereby simplifying the overall integrated circuit design while maintaining versatility.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The memory cell provides flexible operational characteristics for switching speed, cycle endurance, and data retention, allowing it to function as both working and nonvolatile memory, simplifying integrated circuit design by addressing various memory performance demands within a single cell.

Implementation Method 1

Phase change based memory materials, like chalcogenide based materials and similar materials, can be caused to change phase between an amorphous state and a crystalline state by application of electrical current at levels suitable for implementation in integrated circuits.

Methodology Applied
Scientific EffectPhase change: Phase Change

Implementation Method 2

The generally amorphous state is characterized by higher electrical resistivity than the generally crystalline state, which can readily be sensed to indicate data.

Methodology Applied
Scientific EffectElectrical resistivity: Electrical Resistance

Implementation Method 3

A capacitor is electrically coupled to the current path between the first and second access lines.

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS7933139B2One-transistor, one-resistor, one-capacitor phase change memory
Publication Date: 2011.04.26 MACRONIX INTERNATIONAL CO LTD
  • US7933139B2 patent drawing
  • US7933139B2 patent drawing
  • US7933139B2 patent drawing

AI summary

Memory devices and methods for operating such devices are described herein. A memory cell as described herein comprises a transistor electrically coupled to first and second access lines. A programmable resistance memory element is arranged along a current path between the first and second access lines. A capacitor is electrically coupled to the current path between the first and second access lines.