3D Semiconductor Storage Device PN Junction Diode Rectifying Characteristics

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Solution Overview

Problem

Conventional three-dimensional semiconductor storage devices face challenges in forming PN junction diodes with satisfactory rectifying characteristics, leading to memory cell instability and limited integration levels due to difficulties in patterning and uniform impurity distribution, especially when using polysilicon layers with P-type impurities.

Innovation Solution

The semiconductor storage device employs a laminated structure with a P-type semiconductor layer forming part of the PN junction diode, where the P-type semiconductor layer is part of the second wire, and an N-type semiconductor layer is formed in a contact hole within an interlayer dielectric film, allowing for the formation of PN junction diodes with satisfactory rectifying characteristics using a CVD method for polysilicon film deposition and ion implantation of P-type impurities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If polysilicon layers with P-type impurities are used to form PN junction diodes in conventional three-dimensional memory cells, then the memory cell structure can be formed, but the rectifying characteristics are unsatisfactory and memory cell stability deteriorates

Engineering Contradiction:
Improvememory cell stabilityVSAvoidrectifying characteristics
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The invention changes the formation method of P-type impurity layers from conventional ion implantation into pre-formed polysilicon layers to post-formation ion implantation into deposited polysilicon layers. This parameter change in the manufacturing process enables precise control of impurity distribution and concentration, achieving satisfactory rectifying characteristics and memory cell stability simultaneously

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention performs preliminary deposition of polysilicon layers before ion implantation of P-type impurities. This preliminary action creates a uniform base layer that ensures even impurity distribution during subsequent implantation, resolving the instability issue while maintaining good rectifying characteristics

Inventive Principle:
Principle #10Preliminary action

2Productivity

If conventional patterning methods are used for forming memory cells in three-dimensional structure, then the basic memory cell structure can be created, but uniform impurity distribution is difficult to achieve and integration level is limited

Engineering Contradiction:
Improveintegration levelVSAvoiduniform impurity distribution
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The invention changes the sequence of manufacturing operations, depositing polysilicon layers uniformly across the substrate before performing ion implantation. This parameter change in process sequencing allows impurities to be distributed uniformly throughout the polysilicon layer, enabling higher integration levels with consistent device performance

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention segments the manufacturing process into distinct stages: first depositing polysilicon layers, then performing ion implantation, and finally patterning. This segmentation allows each process to be optimized independently, ensuring uniform impurity distribution while achieving high integration levels

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If specialized equipment is used to form PN junction diodes with good rectifying characteristics, then the rectifying characteristics improve, but the manufacturing complexity and cost increase

Engineering Contradiction:
Improverectifying characteristicsVSAvoidspecialized equipment
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The invention uses standard CVD equipment to deposit polysilicon layers that inherently provide uniform impurity distribution when followed by conventional ion implantation. This self-service approach allows the material deposition process itself to contribute to achieving good rectifying characteristics without requiring specialized equipment, reducing manufacturing complexity

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the formation of PN junction diodes with improved rectifying characteristics, preventing memory cell collapse during manufacturing and allowing for higher memory cell density and increased storage capacity without the need for specialized equipment.

Implementation Method 1

ion implantation of P-type impurities

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

PN junction diode that is connected to the storage element

Methodology Applied
Scientific EffectPN junction: Diode

Implementation Method 3

CVD method for polysilicon film deposition

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS7755093B2Semiconductor storage device and method of manufacturing the same
Publication Date: 2010.07.13 MICRON TECHNOLOGY INC
  • US7755093B2 patent drawing
  • US7755093B2 patent drawing
  • US7755093B2 patent drawing

AI summary

A nonvolatile semiconductor storage device is provided in which memory cells comprising PN junction diodes having satisfactory rectifying characteristics are arranged in three dimensions. The semiconductor storage device includes: a first wire which extends in one direction; a second wire which extends in a direction intersecting the first wire; and a memory cell which is positioned at a portion of intersection of the first wire with the second wire between the first wire and the second wire, the memory cell comprising a storage element and a PN junction diode connected thereto, positioned on a side of the second wire used in selecting the memory cell, and a P-type semiconductor forming the PN junction diode forms a portion of the second wire, wherein a plurality of structures, each structure comprising the first wire, the second wire, and the memory cell is provided three-dimensionally.