3D-Printed Memory Gate Array for Configurable Math Functions
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Solution Overview
Problem
Conventional configurable gate arrays are limited by fixed computing elements that cannot be reconfigured, restricting their application to complex math functions and hindering performance and die efficiency.
Innovation Solution
Incorporating three-dimensional printed memory (3D-P) to create configurable computing elements that can realize various math functions, combined with configurable logic elements and interconnects, allowing for the realization of complex math functions through look-up tables and programmable interconnects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If fixed computing elements are used in configurable gate arrays, then manufacturing simplicity is maintained, but adaptability for complex math functions is limited
Solution Approach 1:
The patent applies universality by making computing elements configurable through 3D-P memory arrays that store look-up tables. Each computing element can be programmed to perform different math functions (trigonometric, logarithmic, exponential, etc.) by loading appropriate LUTs, allowing a single hardware structure to serve multiple mathematical purposes rather than requiring dedicated fixed circuits for each function.
Solution Approach 2:
The patent introduces a new dimension of configurability by integrating 3D-P memory arrays that store look-up tables. This adds a programming layer above the physical hardware, enabling software-defined math functions. The transition from fixed to configurable computing elements adds this functional dimension without fundamentally changing the underlying hardware architecture.
2Productivity
If more configurable computing elements are added, then computing power increases, but die size increases
Solution Approach 1:
The patent merges multiple math function implementations into shared 3D-P memory arrays. Instead of dedicating separate hardware circuits for each math function, multiple functions share the same physical memory resources. The look-up tables for different functions (sin, cos, tan, log, exp, etc.) are stored in configurable memory arrays that can be programmed for different purposes, reducing overall die area while maintaining high computing power.
Solution Approach 2:
The computing elements are designed as universal units that can perform multiple math functions through configuration. Each computing element can be programmed to implement different mathematical operations by loading appropriate look-up tables from the 3D-P memory, allowing fewer physical elements to deliver the computing power of many specialized fixed elements.
3Speed
If 3D-P memory is used for look-up tables, then read speed increases, but manufacturing complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-configuring the 3D-P memory arrays with look-up tables during the manufacturing process. The math function data are written into the memory structures before the device is shipped to the customer. This preliminary configuration enables fast read operations during operation without requiring complex runtime programming, as the LUTs are already in place and optimized for high-speed access.
Data Source
AI summary
The present invention discloses a configurable gate array based on three-dimensional printed memory (3D-P). It comprises an array of configurable computing elements, an array of configurable logic elements and a plurality of configurable interconnects. Each configurable computing element can selectively realize a math function from a math library. It comprises a plurality of 3D-P arrays storing the look-up tables (LUT) for the math functions in the math library.