3D Memory Gate Replacement via Sacrificial Segmentation
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Solution Overview
Problem
The existing process of 'gate replacement' in three-dimensional memory fabrication is challenging when there are multiple bottom select gate cuts between adjacent gate slits, as it is difficult to replace gate sacrificial layers with conductive layers due to the blocking effect of dielectric material in the bottom select gate cuts.
Innovation Solution
The method involves forming first sacrificial layers within the bottom select gate cuts and replacing the gate sacrificial layers between two bottom select gate cuts with gate conductive layers via the gaps formed after removing the sacrificial layers, using a 'gate replacement' process that improves process compatibility and feasibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple bottom select gate cuts are formed between adjacent gate slits to separate conductive layers, then electrical influence between adjacent memory cell strings is reduced, but the gate replacement process becomes difficult to perform due to blocking effect of dielectric material
Solution Approach 1:
The patent divides the bottom select gate cut region into multiple segments by forming first sacrificial layers at different positions. These sacrificial layers are removed sequentially to create multiple openings, allowing the gate replacement process to proceed step-by-step through what would otherwise be a blocked region. This segmentation enables both electrical isolation and manufacturability.
Solution Approach 2:
The patent performs preliminary action by forming first sacrificial layers within the bottom select gate cuts before performing the gate replacement process. These sacrificial layers serve as temporary placeholders that are subsequently removed to create access paths for replacing gate sacrificial layers with conductive layers. This preliminary preparation resolves the blocking issue before the critical gate replacement step.
2Reliability
If gate sacrificial layers are replaced with conductive layers via gate slits, then memory cell functionality is achieved, but the process cannot be performed when multiple bottom select gate cuts exist between adjacent gate slits
Solution Approach 1:
The patent introduces first sacrificial layers as intermediary elements between the bottom select gate cuts and the gate replacement process. These intermediary layers are formed, then selectively removed to create access paths, enabling the gate sacrificial layers to be replaced with conductive layers even in the presence of multiple bottom select gate cuts. The intermediary serves as a temporary facilitator that enables the critical replacement operation.
Solution Approach 2:
The patent addresses the blocking problem by transitioning from a two-dimensional planar view to a three-dimensional approach. Instead of attempting to access gate sacrificial layers directly through the blocked gate slit path, the method creates vertical access paths by removing first sacrificial layers at different depths and positions, then uses these multi-level openings to reach and replace the gate sacrificial layers. This dimensional approach bypasses the blocking effect.
Data Source
AI summary
A method for fabricating a three-dimensional memory includes forming a first stack substrate on a substrate. The method also includes forming bottom select gate cuts through the first stack structure, and forming first sacrificial layers within the bottom select gate cuts. The method further includes forming a second stack structure covering the first sacrificial layers and the first stack structure. Both the first stack structure and the second stack structure include alternately stacked dielectric layers and gate sacrificial layers. The method further includes replacing the first sacrificial layers with first conductive layers, and replacing the gate sacrificial layers with gate conductive layers. The method further includes forming trenches exposing the first conductive layers on the side of the first stack structure far away from the second stack structure. The method further includes replacing the first conductive layers with insulating layers via the trenches.