3D Memory Interconnect Layout to Prevent Columnar Void Defects
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Solution Overview
Problem
In three-dimensional semiconductor memory devices, the interconnect layer often fails to achieve a suitable shape due to the protrusion of the columnar portion above the stacked film, leading to void formation and connection defects between the columnar portion and the interconnect layer.
Innovation Solution
The interconnect layer is formed with a lower barrier metal layer, an upper barrier metal layer, and an interconnect material layer, where the upper end of the columnar portion is positioned between the upper and lower faces of the highest insulator, allowing the interconnect layer to embed within the concave portion of the stacked film and columnar structure, preventing void formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the columnar portion protrudes above the stacked film, then the interconnect layer formation becomes simpler, but voids form and connection reliability deteriorates
Solution Approach 1:
The invention controls the vertical dimension (height) of the columnar portion by positioning its upper end between the upper and lower faces of the highest insulator layer. This dimensional control allows the interconnect layer to be formed continuously over the stacked film surface without voids, resolving the contradiction between ease of manufacture and connection reliability.
2Ease of manufacture
If the columnar portion protrudes above the stacked film, then the manufacturing process is simplified, but void formation occurs and manufacturing precision deteriorates
Solution Approach 1:
The invention changes the height parameter of the columnar portion, positioning its upper end between the upper and lower faces of the highest insulator. This parameter adjustment ensures the interconnect layer can be formed with suitable shape and continuity, preventing voids while maintaining manufacturing simplicity.
Data Source
AI summary
In one embodiment, a semiconductor device includes a stacked film including electrode layers and first insulators alternately in a first direction, a top layer of the stacked film being a second insulator that is one of the first insulators. The device further includes a columnar portion including a third insulator, a charge storage layer, a fourth insulator and a first semiconductor layer that are sequentially provided in the stacked film. The device further includes a metal layer provided on the stacked film and the columnar portion, electrically connected to the first semiconductor layer, and including one or more layers. An upper end of the columnar portion is provided at a height between upper and lower faces of the second insulator. A lower end of a highest layer among the one or more layers is provided at a position lower than the upper face of the second insulator.