3D Memory and Control Logic Layout With Conductive Loop Signaling
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Solution Overview
Problem
Conventional microelectronic devices face challenges in increasing integration density and performance due to processing conditions limiting control logic device configurations and performance, which impede size reduction and performance improvements in memory devices.
Innovation Solution
A microelectronic device design incorporating a conductive loop structure that extends through a memory array and control logic regions, allowing for enhanced signal transmission and reduced power consumption by leveraging magnetic flux generated by an induction coil-like structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If control logic devices are placed in a base control logic structure underlying the memory array, then control operations can be performed on memory cells, but processing conditions limit the configurations and performance of control logic devices
Solution Approach 1:
The device is divided into a first substrate containing the memory array and a second substrate containing the control logic circuitry. This segmentation allows each substrate to be optimized independently - the memory array can be fabricated under its specific processing conditions while the control logic can be fabricated under different processing conditions suitable for its performance requirements, thereby resolving the contradiction between reliability and adaptability.
Solution Approach 2:
A bonding interface (intermediary structure) is introduced between the first substrate and second substrate to connect the memory array with the control logic circuitry. This intermediary allows the two substrates to be joined after independent fabrication, enabling flexible configuration of control logic devices without being constrained by the processing conditions of the memory array fabrication, thus improving both performance and configuration flexibility.
2Reliability
If quantities, dimensions, and arrangements of control logic devices are increased to improve performance, then memory cell control capability is enhanced, but the horizontal footprint of the memory device increases
Solution Approach 1:
The control logic circuitry is moved from the same plane (horizontal dimension) as the memory array to a separate vertical dimension by placing it on a second substrate bonded to the first substrate. This dimensional transition allows the control logic devices to be arranged in three-dimensional space, enabling increased quantities and complex arrangements without increasing the horizontal footprint of the memory device, thereby resolving the contradiction between performance and area.
3Ease of manufacture
If conventional base control logic structure is used, then device fabrication is simplified, but signal transmission speed and power consumption are limited
Solution Approach 1:
By segmenting the device into separate substrates for memory array and control logic, each can be optimized for its specific function. The control logic substrate can be designed with shorter signal paths, optimized interconnect structures, and tailored material selections that enhance signal transmission speed without complicating the overall fabrication process, as each substrate can be fabricated using standard processes independently before bonding.
4Use of energy by moving object
If charge pumps are used to improve signal transmission, then power consumption increases, but if eliminated, signal integrity may be compromised
Solution Approach 1:
The charge pump component is extracted and removed from the system. Instead, the invention uses a different architecture where the control logic circuitry is placed on a separate substrate with optimized direct connections to the memory array. This extraction eliminates the need for charge pumps while maintaining signal integrity through improved signal paths and reduced interference, thereby resolving the contradiction between power consumption and signal integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enhances signal transmission speed, improves signal integrity, and reduces power consumption by eliminating the need for charge pumps, thereby increasing performance and capacity.
Implementation Method 1
A microelectronic device design incorporating a conductive loop structure that extends through a memory array and control logic regions, allowing for enhanced signal transmission and reduced power consumption by leveraging magnetic flux generated by an induction coil-like structure.
Data Source
AI summary
A microelectronic device includes a memory array region, an interconnect region, and a control logic region. The memory array region includes a stack structure including tiers each including conductive material and insulative material vertically neighboring the conductive material and conductive routing overlying the stack structure. The interconnect region underlies the memory array region and includes connected bond pads. The control logic region underlies the interconnect region and comprises control logic devices to effectuate control operations for the microelectronic device. The microelectronic device may also include a conductive loop assembly extending, in a looped path, through each of the memory array region, the interconnect region, and the control logic region.