3D Self-Selecting Memory Cells for Low-Leakage Multilevel Storage
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Solution Overview
Problem
Two-dimensional semiconductor memory devices face limitations in increasing integration density due to the area occupied by each memory cell, necessitating the development of three-dimensional (3D) semiconductor memory devices.
Innovation Solution
A 3D memory device with self-selecting memory cells arranged in three dimensions, utilizing a chalcogenide-based material with Ovonic threshold switching characteristics, connected in series with a transistor, and configured to change threshold voltage based on applied voltage polarity and intensity, along with bit and word lines for selective memory operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If 2D semiconductor memory devices are used, then device structure is simple, but integration density is limited
Solution Approach 1:
The patent transitions from 2D memory cell arrangement to 3D stacked memory cell arrangement, utilizing vertical stacking to increase integration density. Multiple memory cells are stacked in the third dimension (vertical direction) rather than expanding in the planar direction, thereby achieving higher capacity without proportionally increasing device area.
2Reliability
If conventional memory cells are used, then structure is simple, but leakage current is high
Solution Approach 1:
The memory cell is divided into two functional parts: a transistor component for switching control and a self-selecting memory layer component for data storage. This segmentation allows each component to be optimized independently - the transistor provides controlled switching while the self-selecting layer provides non-volatile storage with low leakage, achieving both fast operation and low power consumption.
Solution Approach 2:
The self-selecting memory layer automatically selects itself during read operations through its inherent threshold switching characteristics. When a read voltage is applied, the memory layer itself generates the selection signal without requiring additional select transistors, thereby reducing device complexity while maintaining low leakage current through its intrinsic properties.
3Speed
If conventional memory cells are used, then structure is simple, but switching speed is slow
Solution Approach 1:
By separating the switching function (transistor) from the storage function (self-selecting memory layer), the patent enables independent optimization of each component. The transistor can be designed for fast switching operation while the self-selecting layer provides stable non-volatile storage, achieving both high speed and low power consumption simultaneously.
Solution Approach 2:
The self-selecting memory layer performs automatic selection during read operations through its inherent Ovonic threshold switching characteristics, eliminating the need for additional select transistors. This self-selection mechanism reduces the overall device complexity while maintaining fast switching speeds through the intrinsic fast response of the chalcogenide material.
4Use of energy by stationary object
If conventional memory cells are used, then structure is simple, but power consumption is high
Solution Approach 1:
The memory cell is segmented into a transistor for switching and a self-selecting memory layer for storage. This allows the system to use power efficiently - only the transistor needs to be activated for writing, while reading utilizes the low-power self-selecting characteristic of the memory layer, significantly reducing overall power consumption compared to conventional structures.
Solution Approach 2:
The self-selecting memory layer performs selection during read operations without requiring additional active components, thereby minimizing power consumption. The chalcogenide-based material's inherent threshold switching properties enable selection through voltage thresholding alone, eliminating the need for additional select transistors that would increase power usage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The 3D memory device achieves reduced leakage current, faster switching speeds, and multi-level memory capabilities with non-destructive read operations, simplifying operations and reducing power consumption.
Implementation Method 1
The self-selecting memory layer may include a chalcogenide-based material having Ovonic threshold switching characteristics. The self-selecting memory layer may be configured to have a threshold voltage change according to a polarity and an intensity of an applied voltage.
Data Source
AI summary
Provided are a three-dimensional (3D) memory device using a self-selecting memory and/or an operation method of the 3D memory device. The 3D memory device may include a plurality of memory cells arranged in three dimensions on a substrate. Each of the plurality of memory cells may include a transistor and a self-selecting memory layer connected in series. The transistor may include a channel layer and the channel layer may be parallel to a surface of the substrate. The self-selecting memory layer may include a chalcogenide-based material having Ovonic threshold switching characteristics. The self-selecting memory layer may be configured to have a threshold voltage change according to a polarity and an intensity of an applied voltage.