3D Memory Arrays With Perpendicular Conductive Lines
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Solution Overview
Problem
Existing three-dimensional memory arrays face challenges in achieving high memory density and reduced contact area between storage elements and conductive lines, leading to increased programming current and decreased sensing accuracy.
Innovation Solution
The implementation of a three-dimensional memory array structure with conductive lines separated by insulation material, where storage elements are formed between perpendicular conductive lines, reducing contact area and enhancing memory cell density and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional three-dimensional memory array structures are used, then memory cell density is limited, but contact area between storage elements and conductive lines increases leading to higher programming current
Solution Approach 1:
The patent transitions from planar two-dimensional memory arrays to three-dimensional vertically-stacked memory structures. Multiple layers of bit lines and word lines are stacked vertically with storage elements positioned between them, enabling significant increase in memory cell density while reducing the contact area between storage elements and conductive lines through the vertical stacking architecture
2Loss of energy
If contact area between storage elements and conductive lines is increased, then programming current increases, but sensing accuracy decreases
Solution Approach 1:
The patent segments the memory array into multiple distinct layers with bit lines and word lines stacked vertically. Storage elements are positioned between specific layers of conductive lines, creating isolated contact regions. This segmentation reduces the overall contact area between storage elements and conductive lines, thereby reducing programming current while maintaining sufficient signal strength for accurate sensing through the structured vertical arrangement
Data Source
AI summary
The present disclosure includes three dimensional memory arrays. An embodiment includes a first plurality of conductive lines separated from one another by an insulation material, a second plurality of conductive lines arranged to extend substantially perpendicular to and pass through the first plurality of conductive lines and the insulation material, and a storage element material formed between the first and second plurality of conductive lines where the second plurality of conductive lines pass through the first plurality of conductive lines. The storage element material is between and in direct contact with a first portion of each respective one of the first plurality of conductive lines and a portion of a first one of the second plurality of conductive lines, and a second portion of each respective one of the first plurality of conductive lines and a portion of a second one of the second plurality of conductive lines.