3D Nonvolatile Memory Programming Method Using Localized Bit Line Voltages
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Solution Overview
Problem
Current semiconductor memory devices face challenges in efficiently programming and reading data in three-dimensional nonvolatile memory devices, particularly in maintaining data integrity and reducing program disturbance across memory cells.
Innovation Solution
The implementation of a programming method that applies specific voltage levels to bit lines and word lines in a three-dimensional nonvolatile memory device, using a decoder to manage string selection transistors and page buffers to control voltages and prevent program disturbance, allowing for precise programming and reading operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high voltage is applied to bit lines for programming memory cells, then programming speed is improved, but program disturbance to unselected memory cells increases
Solution Approach 1:
The patent applies different voltage levels to different bit lines based on their selection status. Selected bit lines receive high voltage (VBL_PGM) for fast programming, while unselected bit lines receive low voltage (VBL_PASS) to prevent program disturbance. This local differentiation of voltage quality enables simultaneous optimization of programming speed and data integrity across different memory cell groups.
Solution Approach 2:
The patent segments the bit line voltage application into distinct groups: selected bit lines connected to target memory cells receive programming voltage, while unselected bit lines receive pass voltage. This segmentation allows independent voltage control for different functional groups, resolving the contradiction between speed and disturbance by treating selected and unselected cells differently.
2Productivity
If multiple memory strings are programmed simultaneously through same column, then productivity is improved, but control complexity increases
Solution Approach 1:
The patent merges the programming operation across multiple memory strings by applying the same high voltage to all selected bit lines in the same column simultaneously. This combining approach enables parallel programming of multiple strings through the same column, improving productivity while the unified voltage control scheme keeps complexity manageable.
Solution Approach 2:
The patent implements a universal voltage control approach where selected bit lines regardless of which specific memory string they connect to receive the same programming voltage level. This multi-functional voltage application enables simultaneous programming across different string groups, achieving high throughput with standardized control logic.
3Reliability
If positive voltage is applied to unselected bit lines, then program disturbance is prevented, but energy consumption increases
Solution Approach 1:
The patent changes the voltage parameter for unselected bit lines from high (programming voltage) to low (pass voltage) to prevent program disturbance. By adjusting this critical parameter, the patent protects data integrity in unselected memory cells while significantly reducing the energy consumption associated with maintaining high voltage across all bit lines.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances data integrity and reliability by minimizing program disturbance and improving the programming efficiency across memory cells, thereby improving the overall performance of three-dimensional nonvolatile memory devices.
Implementation Method 1
applying a first voltage to a selected bit line connected to at least two memory strings in same column including a memory cell of the plurality of memory cell to be programmed, applying a second voltage to an unselected bit line connected to at least two memory strings in same column including a memory cell of the plurality of memory cell to be program-prohibited
Data Source
AI summary
Provided is a programming method of a nonvolatile memory device. The nonvolatile memory device includes a substrate and a plurality of memory cells which are stacked in the direction perpendicular to the substrate. The programming method applies a first voltage to a selected bit line connected to at least two memory strings in same column including a memory cell of the plurality of memory cell to be programmed, applies a second voltage to an unselected bit line connected to at least two memory strings in same column including a memory cell of the plurality of memory cell to be program-prohibited, applies a third voltage to a selected string selection line connected to at least two memory strings in same row, applies a fourth voltage to an unselected string selection line connected to at least two memory strings in same row, and applies a program operation voltage to a plurality of word lines, each word line connected to each corresponding memory cell in the memory string, wherein the first to third voltages are positive voltages.