3D Memory Read Setup Bias for Voltage Consistency
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Solution Overview
Problem
High-density memory technologies, such as 3D NAND memory, face challenges due to changes in resistivity over time, which affect threshold voltages and reduce operating windows, leading to inconsistent memory cell performance.
Innovation Solution
Implementing a read setup operation that applies a read setup bias to selected memory cells while disabling current flow to sense amplifier circuits, using control circuits to manage string select gates, bit line select gates, and source side select gates to maintain consistent resistivities and threshold voltages, thereby reducing power loss and improving memory cell readiness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read setup bias is applied to memory cells, then threshold voltage consistency is improved, but power consumption increases due to current flow through sense amplifier circuits
Solution Approach 1:
The patent applies read setup bias to memory cells in advance of actual read operations to pre-condition the cells and stabilize threshold voltages. This preliminary action ensures consistent threshold voltages during subsequent read operations while allowing current flow to be disabled during the setup phase, reducing overall power consumption.
Solution Approach 2:
The patent implements periodic read setup operations at predetermined intervals to maintain threshold voltage consistency across memory cells. By applying bias periodically rather than continuously, the system achieves reliable threshold voltage stabilization while minimizing power consumption through intermittent operation.
2Reliability
If read setup operation is implemented, then operating window is increased, but device complexity increases due to additional control circuit operations
Solution Approach 1:
The patent integrates read setup operations into existing memory control circuits, allowing the same control logic to perform both normal read operations and read setup operations. The control circuit determines whether to perform read setup based on operation type, block status, and timing, making the circuit multi-functional without requiring entirely separate dedicated hardware.
Solution Approach 2:
The control circuit performs read setup operations in advance of actual read operations when blocks are in idle or non-critical states. By preliminarily conditioning memory blocks before they are needed for data operations, the system increases the operating window without interfering with critical data paths, as the setup completes beforehand.
3Loss of energy
If current flow is disabled during read setup bias, then power loss is reduced, but memory cell readiness may be affected
Solution Approach 1:
The patent applies read setup bias to memory cells in advance of actual read operations, pre-conditioning the cells while current flow is disabled. This preliminary conditioning stabilizes threshold voltages and prepares cells for subsequent read operations, ensuring readiness is achieved before the actual data read when power consumption is critical.
Solution Approach 2:
The system implements periodic read setup operations at predetermined intervals, applying bias voltage periodically to maintain cell readiness. By timing these operations to occur during idle periods or before anticipated read operations, the system reduces power loss during active data operations while ensuring cells are properly conditioned when needed.
Data Source
AI summary
A memory having a plurality of blocks is coupled with control circuits having logic to execute a no-current read setup operation, the read setup operation comprising simultaneously applying a read setup bias to a plurality of memory cells of a selected block of the plurality of blocks while disabling current flow. Logic to traverse the blocks in the plurality of blocks can apply the read setup operation to the plurality of blocks. The blocks in the plurality of blocks can include, respectively, a plurality of sub-blocks. The read setup operation can traverse sub-blocks in a block to simultaneously apply the read setup bias to more than one individual sub-block of the selected block. A block status table can be used to identify stale blocks for the read setup operation. Also, the blocks can be traversed as a background operation independent of read commands addressing the blocks.