3D Memory Device Recess Stress Relief
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Solution Overview
Problem
The existing methods for fabricating 3D memory devices face challenges with substrate bending due to intrinsic and thermal stress, leading to poor alignment and performance issues as the number of stacked layers increases, affecting memory density and reliability.
Innovation Solution
A 3D memory device is fabricated using a substrate with a concave portion and a multi-layers stack that includes conductive and insulating layers, where a recess is formed with a cross-sectional bottom profile significantly larger than the opening profile, allowing for dielectric material filling and stress relief, which enhances alignment and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the stacking number of the multi-layers stack is increased to increase memory density, then the memory density is improved, but the substrate bending due to intrinsic stress and thermal stress worsens
Solution Approach 1:
The substrate is divided into a first region and a second region, with the multi-layers stack formed only in the first region. This spatial segmentation allows the substrate to be structurally divided, enabling stress relief in one region while maintaining functionality in another region, thus resolving the contradiction between increasing stack height for memory density and preventing substrate bending.
Solution Approach 2:
A recess is formed in the substrate beneath the multi-layers stack, extracting substrate material to create a stress-relief cavity. This extraction removes the conflicting element (substrate material causing stress) while preserving the functional stack structure, allowing high stacking numbers without substrate bending.
2Quantity of substance
If the stacking number of the multi-layers stack is increased to increase memory density, then the memory density is improved, but the alignment precision of subsequently formed elements deteriorates
Solution Approach 1:
By segmenting the substrate into a first region (with stack) and a second region (without stack), the patent creates a stable reference plane in the second region. This segmentation ensures that subsequent alignment operations can reference the non-bending second region, maintaining manufacturing precision even as the first region's stack height increases for memory density.
Solution Approach 2:
The recess formation extracts substrate material to eliminate the source of bending and misalignment. This creates a stable foundation that prevents distortion during subsequent fabrication steps, ensuring that elements formed after stack creation maintain precise alignment regardless of the number of stacked layers.
3Quantity of substance
If the stacking number of the multi-layers stack is increased to increase memory density, then the memory density is improved, but the performance of the 3D memory device deteriorates
Solution Approach 1:
The substrate segmentation into first and second regions isolates the high-stress multi-layers stack from the rest of the substrate. This allows the stack to achieve high memory density through increased stacking while the second region maintains overall device stability and performance, preventing the propagation of stress-induced degradation.
Solution Approach 2:
By extracting substrate material to form a recess beneath the stack, the patent removes the source of intrinsic and thermal stress that would otherwise degrade device performance. This enables high stacking numbers to be achieved without the performance deterioration that would normally result from stress accumulation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The stress relief design prevents substrate bending, improves alignment and yield, and enhances the performance of the 3D memory device by allowing for precise alignment of elements and increased memory density without shrinking critical sizes.
Implementation Method 1
The intrinsic stress and thermal stress resulted from the multi-layers stack can be released by the recess
Data Source
AI summary
A 3D memory device includes a substrate, a multi-layers stack and a dielectric material. The substrate has a concave portion extending along a first direction into the substrate from a surface thereof. The multi-layers stack includes a plurality of conductive layers and a plurality of insulating layers alternatively stacked along the first direction on a bottom of the concave portion. The multi-layers stack also has at least one recess passing through the conductive layers and the insulating layers along the first direction, wherein the recess has a cross-sectional bottom profile and a cross-sectional opening profile perpendicular to the first direction and the cross-sectional bottom profile has a size substantially greater than that of the cross-sectional opening profile. The dielectric material is at least partially filled in the recess.