3D Memory Signal Routing Through Isolated Conductive Paths
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Solution Overview
Problem
Three-dimensional memory devices face limitations in the number of word lines due to etch process constraints and degradation of peripheral circuitry from thermal cycling and hydrogen diffusion, which affects the performance of support circuitry and memory cell operations.
Innovation Solution
A bonded chip structure is formed using a memory die with memory elements and a support die containing peripheral devices, where an electrically conductive path isolated from the memory elements is established through the memory die, enabling enhanced signal routing and support circuitry performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If support circuitry is formed on the same substrate as the three-dimensional memory device, then device complexity is reduced, but the peripheral circuitry degrades due to thermal cycling and hydrogen diffusion
Solution Approach 1:
The device is divided into two separate substrates: a first substrate containing the three-dimensional memory device and a second substrate containing the support circuitry. This segmentation allows each substrate to be optimized independently, preventing thermal cycling and hydrogen diffusion from degrading the peripheral circuitry while maintaining overall device functionality.
Solution Approach 2:
A bonding interface is introduced as an intermediary between the first substrate (memory device) and the second substrate (support circuitry). This bonding interface enables electrical connection and mechanical support while isolating the peripheral circuitry from the harmful thermal and chemical effects generated during memory device operation.
2Manufacturing precision
If etch process constraints are followed for three-dimensional memory device fabrication, then manufacturing precision is maintained, but the number of word lines is limited
Solution Approach 1:
The patent moves the support circuitry from the same plane as the memory device to a separate substrate dimension. This dimensional separation allows the memory device to achieve higher word line counts through vertical stacking without being constrained by etch process limitations that would affect planar support circuitry integration.
3Reliability
If peripheral devices are placed on a separate support die, then support circuitry performance improves, but device complexity increases
Solution Approach 1:
The patent combines the memory device and support circuitry into a single integrated device structure through substrate bonding. Although the support circuitry is on a separate substrate, the bonding process merges the two functional units into one cohesive device, maintaining improved peripheral circuitry performance while presenting a unified interface to external connections.
Data Source
AI summary
A memory device includes a memory die containing memory elements, a support die containing peripheral devices and bonded to the memory die, and an electrically conductive path between two of the peripheral devices which extends at least partially through the memory die. The electrically conductive path is electrically isolated from the memory elements.