3D Memory Cell Structure With Segmented Common Source Layers
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor devices face challenges in achieving high-capacity data storage with efficient operating characteristics and integration, particularly in vertical memory string configurations.
Innovation Solution
The semiconductor device incorporates a peripheral circuit structure, a cell structure with gate electrodes, and channel structures extending vertically through the gate electrodes. The common source layer includes stack isolation trenches and channel trenches, with a cylindrical channel layer and charge storage and blocking dielectric layers stacked on the channel layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are arranged in three dimensions vertically instead of two dimensions, then data storage capacity is increased, but RC delay and capacitance increase
Solution Approach 1:
The common source layer is divided into multiple independently formed regions corresponding to different memory string groups. Each region can be independently connected to bit lines, allowing selective activation and reducing the capacitive load on any single bit line. This segmentation reduces RC delay by limiting the charging/discharging scope to smaller groups rather than all memory cells simultaneously.
Solution Approach 2:
The patent transitions from two-dimensional planar arrangement to three-dimensional vertical stacking of memory cells. Multiple layers of gate electrodes and channel structures are stacked vertically to increase storage density. This dimensional change allows significantly more storage capacity within the same footprint while managing capacitance through the segmented common source layer design.
2Quantity of substance
If memory cells are arranged in three dimensions vertically instead of two dimensions, then data storage capacity is increased, but capacitance increases
Solution Approach 1:
The common source layer is segmented into multiple independent regions, each associated with specific memory string groups. This allows the capacitance to be distributed across multiple smaller capacitive nodes rather than one large capacitive load. During read/write operations, only the capacitance of the selected region needs to be charged or discharged, reducing overall energy consumption.
Solution Approach 2:
Different regions of the common source layer can be independently connected to different bit lines, allowing local optimization of capacitive coupling. Each local region has its own capacitive characteristics that can be optimized for specific operational requirements, reducing overall system capacitance while maintaining high storage capacity.
3Ease of manufacture
If common source layer is formed as a single continuous structure, then manufacturing is simpler, but RC delay and capacitance increase
Solution Approach 1:
The common source layer is formed as multiple separate regions rather than a single continuous structure. Each region corresponds to specific memory string groups and can be independently processed and connected. This segmentation reduces RC delay by limiting signal propagation distance and capacitive load, while still maintaining manufacturing simplicity through standardized formation processes for each region.
Data Source
AI summary
A semiconductor device including a peripheral circuit structure, a cell structure including gate electrodes and stacked on the peripheral circuit structure, the cell structure including a cell region, a connection region, and a peripheral circuit connection region, the cell structure, a plurality of channel structures extending in a vertical direction through the gate electrodes in the cell region, each of the plurality of channel structures including a first end portion close to the peripheral circuit structure and a second end portion opposite to the first end portion, and a common source layer connected to the second end portion of each of the channel structures in the cell region may be provided.