3D Memory Cell String Layout With Split Selection Transistors

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing semiconductor devices face challenges in increasing data storage capacity while maintaining reliability and integration.

Innovation Solution

A semiconductor device is designed with a substrate, multiple cell strings perpendicular to the substrate's upper surface, and a bit line connected to at least six cell strings. Each cell string includes memory cells connected in series, ground selection transistors with different threshold voltage distributions, and a string selection transistor, allowing for common control of certain transistors and electrical separation of others.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are arranged three-dimensionally to increase data storage capacity, then storage capacity is improved, but device complexity increases

Engineering Contradiction:
Improvedata storage capacityVSAvoiddevice complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The cell string is divided into multiple independently controllable segments through the use of multiple ground selection transistors (GST0-GST3) and string selection transistors (SST0-SST5). Each segment can be selectively accessed and controlled, enabling efficient management of the three-dimensional memory structure while maintaining organizational simplicity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a three-dimensional vertical stacking architecture where memory cells are arranged in cell strings extending perpendicular to the substrate surface. This vertical dimension allows significant increase in storage capacity without proportionally increasing planar area or device complexity, as the multi-layer GST and SST structure provides systematic control along the vertical axis.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If multiple ground selection transistors are used in each cell string, then reliability is improved, but manufacturing complexity increases

Engineering Contradiction:
ImprovereliabilityVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

Multiple ground selection transistors (GST0-GST3) are merged into a single cell string structure, sharing common source lines and control mechanisms. This consolidation approach improves reliability through redundant selection paths while avoiding proportional increases in manufacturing complexity, as the transistors are integrated using standardized fabrication processes.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The ground selection transistors serve multiple functions: they act as selection switches for different memory segments, provide isolation between cell strings, and enable flexible addressing schemes. This multi-functionality reduces the need for additional dedicated structures, simplifying manufacturing while enhancing reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If string selection transistors are electrically separated, then reliability is improved, but device complexity increases

Engineering Contradiction:
ImprovereliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The string selection transistors (SST0-SST5) are electrically separated into distinct, independent units, each controlling a specific cell string. This segmentation improves reliability by isolating selection operations to prevent interference between adjacent strings, while the modular nature of the separation keeps device complexity manageable through systematic organization.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250078929A1Semiconductor device and electronic system including the same
Publication Date: 2025.03.06 SAMSUNG ELECTRONICS CO LTD
  • US20250078929A1 patent drawing
  • US20250078929A1 patent drawing
  • US20250078929A1 patent drawing

AI summary

A semiconductor device may include a substrate, a plurality of cell strings perpendicular to an upper surface of the substrate, and a bit line connected to at least six of the cell strings. Each of the cell strings may include a plurality of memory cells connected in series to each other in a direction perpendicular to the upper surface of the substrate, first to fourth ground selection transistors connected in series to each other between the plurality of memory cells and the substrate, and a string selection transistor between the plurality of memory cells and the bit line. A first one of the first to fourth selection ground selection transistors may have a first threshold voltage distribution, and a second one of the first to fourth ground selection transistors may have a second threshold voltage distribution. The second threshold voltage distribution may be different from the first threshold voltage distribution.