3D Memory Structure Variation Detection and Adaptive ECC

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Solution Overview

Problem

Three-dimensional memory configurations face challenges in maintaining data storage capacity and accuracy due to variations in structure tapering, which affect the performance of storage elements and increase bit errors, necessitating adaptive error correction and memory access techniques.

Innovation Solution

A data storage device with a three-dimensional memory configuration that uses a controller to determine the location of structural variations, generating ECC and memory access parameter tables to adjust encoding and access techniques based on layer-specific parameters, employing different ECC techniques like BCH and LDPC for error correction and varying programming and read voltages for storage elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a three-dimensional memory configuration with multiple stacked layers is used to increase data storage capacity, then storage density is improved, but structural variations and tapering effects increase causing performance degradation and bit errors

Engineering Contradiction:
Improvedata storage capacityVSAvoiddata accuracy
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies local quality by implementing layer-specific ECC parameters and memory access parameters that are tailored to the specific characteristics of each layer or region. Different portions of the 3D memory structure receive customized error correction and access techniques based on their local structural variations and tapering effects, rather than using a uniform approach across the entire memory device.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes parameters by dynamically adjusting ECC parameters (such as code rate, codeword length, and error correction capability) and memory access parameters (such as programming voltage, read voltage, and pulse width) based on the detected structural variations and tapering effects in different layers. This allows the system to adapt to the changing physical characteristics as it moves through the 3D memory structure.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If uniform ECC and memory access parameters are used across all layers, then device complexity is reduced, but performance accuracy deteriorates due to ignoring layer-specific variations

Engineering Contradiction:
Improveparameter uniformityVSAvoidperformance accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent implements dynamics by making ECC parameters and memory access parameters variable and adaptive rather than static and uniform. The system dynamically selects and adjusts parameters based on real-time detection of structural variations and tapering effects in different layers, allowing the memory device to adapt its operation to the specific physical characteristics of each layer.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies segmentation by dividing the 3D memory structure into distinct layers or regions, each with its own set of optimized ECC parameters and memory access parameters. This segmentation allows the system to treat each layer independently based on its specific structural characteristics, improving overall performance accuracy.

Inventive Principle:
Principle #1Segmentation

3Ease of manufacture

If the etch process creates a tapered profile to connect multiple layers, then manufacturing feasibility is improved, but structural uniformity deteriorates affecting storage element performance

Engineering Contradiction:
Improvelayer connectivityVSAvoidstructural uniformity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent converts the harmful effect of structural tapering and variations into a benefit by using these same structural characteristics as the basis for optimizing memory operation. Instead of trying to eliminate the tapering, the system detects and characterizes it, then uses this information to adjust ECC and memory access parameters to compensate for the structural non-uniformity, effectively turning the manufacturing challenge into an opportunity for optimized performance.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS8996838B1Structure variation detection for a memory having a three-dimensional memory configuration
Publication Date: 2015.03.31 PALISADE TECH LLP
  • US8996838B1 patent drawing
  • US8996838B1 patent drawing
  • US8996838B1 patent drawing

AI summary

A data storage device includes a memory having a three-dimensional (3D) memory configuration. The memory includes a structure that extends through multiple layers of the memory. A method includes storing information at the data storage device. The information identifies a location associated with a variation of the structure. The method further includes accessing the information.