3D Memory Word Line Voltage Control for Program Disturb

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Solution Overview

Problem

The narrow spacing between memory cells in three-dimensional flash memory devices leads to program disturb issues, affecting the reliability and performance of data storage due to increased coupling between word lines, which causes changes in threshold voltage distributions and reduces data retention.

Innovation Solution

The proposed solution involves applying specific pass voltages to adjacent word lines during the setup and execution periods of program loops, with the first selected word line receiving a first program voltage and the upper adjacent word line receiving a second pass voltage smaller than the first, to control channel boosting and reduce coupling effects, thereby improving reliability and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are stacked in a three-dimensional structure to improve integration, then storage capacity increases, but program disturb occurs due to narrow spacing between memory cells

Engineering Contradiction:
Improvestorage capacityVSAvoidprogram disturb
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies different pass voltages to different word lines based on their spatial relationship to the selected word line. Specifically, a first pass voltage is applied to a first upper adjacent word line and a second pass voltage is applied to a second upper adjacent word line, where the voltages are differentiated to account for the varying coupling strengths at different distances. This local differentiation of voltage conditions resolves the program disturb issue while maintaining high-density three-dimensional stacking.

Inventive Principle:
Principle #3Local quality

2Reliability

If pass voltage is applied to upper adjacent word line during setup period to prevent program disturb, then reliability improves, but setup time increases

Engineering Contradiction:
Improveprogram disturbVSAvoidsetup time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies a first pass voltage to the first upper adjacent word line during a setup period before the main program operation. This preliminary voltage application prevents program disturb by establishing appropriate voltage conditions on adjacent word lines in advance. The setup period is followed by a program execution period where a second pass voltage is applied, allowing the actual programming to occur without interference from improper voltage conditions on adjacent word lines.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent dynamically adjusts the pass voltage levels based on the operational phase and the specific word line being programmed. The controller selectively applies different pass voltages (first pass voltage vs. second pass voltage) to different upper adjacent word lines depending on their distance from the selected word line and the current operational state. This dynamic voltage adjustment optimizes both reliability and timing efficiency.

Inventive Principle:
Principle #15Dynamics

3Productivity

If higher pass voltage is applied to ensure stable channel boosting, then programming efficiency improves, but coupling effects increase causing threshold voltage distribution changes

Engineering Contradiction:
Improveprogramming efficiencyVSAvoidthreshold voltage distribution
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies different pass voltages to different upper adjacent word lines based on their distance from the selected word line. The first upper adjacent word line (closer to the selected word line) receives a first pass voltage, while the second upper adjacent word line (farther from the selected word line) receives a second pass voltage. This local differentiation ensures that channel boosting is effective where needed while minimizing unwanted coupling effects on more distant word lines, thereby maintaining stable threshold voltage distributions.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the pass voltage parameter selectively based on the word line position and operational requirements. By varying the pass voltage magnitude for different upper adjacent word lines, the system optimizes channel boosting for the selected word line while controlling the impact on adjacent word lines. This parameter adjustment balances programming efficiency with the maintenance of stable threshold voltage distributions across the memory array.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of data storage by reducing program disturb and maintaining stable threshold voltage distributions, while also shortening the time required to set up program voltages, thus improving overall memory device performance.

Implementation Method 1

increased coupling between word lines, which causes changes in threshold voltage distributions

Methodology Applied
Scientific EffectElectrical coupling between word lines: Conduction (electrical)

Implementation Method 2

applying a first pass voltage to a first upper adjacent word line... applying a second pass voltage smaller than the first pass voltage to the first upper adjacent word line

Methodology Applied
Scientific EffectChannel boosting effect: Electric Field

Data Source

PatentUS20240079069A1Operation method of memory device
Publication Date: 2024.03.07 SAMSUNG ELECTRONICS CO LTD
  • US20240079069A1 patent drawing
  • US20240079069A1 patent drawing
  • US20240079069A1 patent drawing

AI summary

Disclosed is an operation method of a memory device which includes a plurality of memory cells stacked in a direction perpendicular to a substrate and a plurality of word lines respectively connected with the plurality of memory cells. The method includes applying a 0-th pass voltage to a first selected word line among the plurality of word lines and applying a first pass voltage to a first upper adjacent word line among the plurality of word lines, during a first word line setup period, and applying a first program voltage to the first selected word line and applying a second pass voltage smaller than the first pass voltage to the first upper adjacent word line, during a first program execution period after the first word line setup period. The first upper adjacent word line is a word line physically adjacent to the first selected word line.