3D Memory Word Line Inclination for Contact Margin
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Solution Overview
Problem
Highly integrated semiconductor devices face challenges in securing process margins for connecting complex patterns, leading to reliability issues and potential performance decreases due to manufacturing process failures.
Innovation Solution
A semiconductor memory device with a three-dimensional structure featuring a memory string and word lines with alternating connections to conductive lines, providing improved contact process margins through a method involving a substrate with alternating insulating and conductive layers, and inclined word lines connected to conductive lines on either side of the memory string.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional two-dimensional semiconductor devices are used, then manufacturing process is simpler, but integration density and specifications are limited
Solution Approach 1:
The patent transitions from traditional two-dimensional planar structures to three-dimensional vertical structures by extending memory strings and word lines in the vertical direction. Memory strings extend vertically from the substrate, and word lines are formed as inclined structures connecting to conductive lines at different heights, enabling higher integration density while managing structural complexity through systematic 3D architecture design.
2Quantity of substance
If highly integrated semiconductor devices with complex patterns are manufactured, then integration density increases, but process margins for connecting patterns are reduced
Solution Approach 1:
The patent utilizes the vertical dimension to separate connection points into different height levels. Word lines are formed as inclined structures that connect memory strings to conductive lines at elevated positions, distributing connection points in the vertical direction. This reduces lateral congestion and improves process margins for pattern connections while maintaining high integration density.
Solution Approach 2:
The patent segments the connection architecture by dividing word lines into multiple groups (first group connected to first conductive lines, second group connected to second conductive lines). This segmentation distributes connection points across different locations and heights, reducing the complexity of any single connection point and improving overall connection reliability in highly integrated devices.
3Quantity of substance
If complex three-dimensional patterns are used to achieve higher integration, then device specifications improve, but manufacturing failures increase
Solution Approach 1:
The patent employs vertical extension of memory strings and inclined word lines to achieve higher integration density. By utilizing the vertical dimension for routing and connection, the patent reduces lateral pattern complexity and improves manufacturing process margins, as vertical structures can be formed with better process control compared to highly complex lateral interconnections.
Solution Approach 2:
The patent applies different structural configurations to different regions: memory strings are formed with specific vertical orientations, word lines are created as inclined structures with specific angles, and conductive lines are positioned at different heights. This local optimization of structural quality in different regions improves ease of manufacture while achieving high integration density.
Data Source
AI summary
A semiconductor memory device includes a substantially planar substrate; a memory string vertical to the substrate, the memory string comprising a plurality of storage cells; and a plurality of elongated word lines, each word line including a first portion substantially parallel to the substrate and connected to the memory string and a second portion substantially inclined relative to the substrate and extending above the substrate, wherein a first group of the plurality of word lines are electrically connected to first conductive lines disposed at a first side of the memory string, and a second group of the plurality of word lines are electrically connected to second conductive lines disposed at a second side of the memory string.