3D Metal Interconnect Structure for Misalignment-Tolerant Semiconductor Wiring
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Solution Overview
Problem
Current semiconductor manufacturing techniques face challenges in accurately defining and controlling the position of through holes, leading to dimensional shifts and dislocations that affect the performance and reliability of semiconductor devices due to misaligned interconnections.
Innovation Solution
A semiconductor device design that includes a metal interconnecting structure electrically connecting a second wire above an insulating layer to a first wire below, with the structure physically contacting both the top surface and sidewall of each wire, allowing for improved alignment and reliability of interconnections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional through hole formation techniques are used, then the manufacturing process is simple, but the positioning precision and dimensional control of through holes deteriorate
Solution Approach 1:
The invention transitions from planar through-hole formation to three-dimensional viaduct structures that extend vertically through multiple dielectric layers. The viaducts are formed by sequentially depositing conductive materials (tungsten, copper, or cobalt) and insulating materials to create vertical interconnection paths, enabling precise positioning and dimensional control in the vertical dimension while maintaining compatibility with existing CMOS fabrication processes
Solution Approach 2:
The interconnection structure is segmented into discrete viaducts that can be independently formed, positioned, and controlled. Each viaduct is a separate conductive structure with defined dimensions, allowing individual optimization of positioning precision and dimensional control without affecting the entire interconnection system. The segmented approach enables selective formation of viaducts at different locations and depths within the dielectric layers
2Productivity
If miniaturized through holes are used, then the cell density increases, but the control over through hole position and dimension deteriorates
Solution Approach 1:
The invention changes the critical parameters from horizontal through-hole dimensions to vertical viaduct dimensions. By controlling the height, diameter, and vertical positioning of viaducts rather than horizontal through-hole parameters, the system achieves superior dimensional control. The viaduct formation process uses atomic layer deposition (ALD) and chemical vapor deposition (CVD) techniques that provide precise control over film thickness and material properties at the nanoscale
Solution Approach 2:
The viaduct structures are formed preliminarily within the dielectric layers before final interconnection layer formation. This preliminary action allows for precise positioning and dimensional control to be established early in the fabrication process, setting the foundation for high cell density while maintaining manufacturing precision. The conductive and insulating material layers are deposited in advance with controlled thicknesses to define the viaduct dimensions
Data Source
AI summary
The present disclosure provides a semiconductor device and a method of fabricating the same including a first wire, a first insulating layer, a second wire, and a metal interconnecting structure. The first wire is disposed within a first dielectric layer. The first insulating layer is disposed on the first dielectric layer, covering the first wire. The second wire is disposed within a second dielectric layer, partially overlapping the first wire. The metal interconnecting structure is disposed within the second dielectric layer and the first insulating layer, to physically contact a top surface and a sidewall of the second wire and a top surface of the first wire. Through the arrangements of the metal interconnecting structure, the function and the structural reliability of interconnections will be improved, and the semiconductor device enables to gain an optimized operation and performance.