3D MIM Capacitor Using Trench Contacts and Fill Metal
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Solution Overview
Problem
Conventional planar MIM capacitors occupy a large chip area, necessitating a design that increases capacitance for a given chip area.
Innovation Solution
The development of three-dimensional MIM capacitors with a metal gate and trench metal contacts as one electrode, and a fill metal between the gate and contacts as the second electrode, separated by a high-κ dielectric, allowing for increased capacitance within a smaller area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional planar MIM capacitor designs are used, then the capacitor structure is simple and easy to manufacture, but the chip area consumed is large
Solution Approach 1:
The patent transitions from a conventional planar (2D) capacitor structure to a three-dimensional structure by forming trench contacts that extend vertically into the substrate and filling the space between the metal gate and trench contacts with capacitor dielectric and fill metal. This vertical utilization of space dramatically increases capacitance density while reducing the lateral chip area required.
Solution Approach 2:
The capacitor structure is formed by nesting multiple components within each other: the capacitor dielectric is deposited within the gaps between the metal gate and trench contacts, and the fill metal is subsequently deposited to fill the remaining space. This nested arrangement maximizes the use of available volume and increases capacitance without proportionally increasing chip area.
2Quantity of substance
If three-dimensional MIM capacitor structures are formed, then capacitance per chip area is increased, but the fabrication process complexity increases
Solution Approach 1:
The fabrication process is segmented into distinct sequential steps: forming the metal gate and source/drain regions, forming trench contacts, selectively removing dielectric material to create gaps, depositing capacitor dielectric in the gaps, and depositing fill metal. This segmentation allows each step to be optimized independently and integrated into existing CMOS fabrication processes.
Solution Approach 2:
The metal gate and source/drain regions are formed first, establishing the basic transistor structure. The trench contacts are then formed, and the dielectric removal is performed selectively to create the capacitor gaps before the final capacitor dielectric and fill metal are deposited. This preliminary structuring enables subsequent steps to proceed efficiently.
3Quantity of substance
If three-dimensional MIM capacitor structures are used, then capacitance is increased for a given area, but the number of fabrication steps increases
Solution Approach 1:
The metal gate structure serves dual purposes: as the gate electrode for the MOSFET and as one electrode (along with the trench contacts) for the MIM capacitor. The trench contacts serve both as electrical connections to the source/drain regions and as structural elements that define the capacitor gaps. This multi-functionality reduces the total number of separate components and fabrication steps required.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively increases capacitance for a given chip area, making it suitable for on-chip applications where space is limited, while being compatible with standard CMOS processing and co-fabrication with MOSFETs.
Implementation Method 1
a capacitor dielectric separates the first electrode from the second electrode
Implementation Method 2
separated by a high-κ dielectric, allowing for increased capacitance within a smaller area
Data Source
AI summary
On-chip, three-dimensional MIM capacitors are provided. In one aspect, a method for forming a device includes: forming at least one MOSFET structure and at least one MIM capacitor structure on a substrate each structure including: a metal gate, and source and drain regions on opposite sides of the metal gate, and wherein the structures are buried in a dielectric; forming metal contacts in the dielectric down to the source and drain regions; forming a mask that selectively covers the MOSFET structure; removing the dielectric from uncovered portions of the MIM capacitor structure forming gaps between the metal contacts and the metal gate in the MIM capacitor structure; depositing a capacitor dielectric in the gaps; and depositing a fill metal onto the capacitor dielectric filling the gaps. A MIM capacitor and a device including an MIM capacitor are also provided.