3D Electronic Module Collective Fabrication
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Solution Overview
Problem
The challenge is to develop a collective manufacturing process for 3D electronic modules that can operate at high frequencies above 1 GHz and withstand operating temperatures between -55°C and +125°C while maintaining a reduced thickness, as existing methods using bare chips face inefficiencies in testing and stacking.
Innovation Solution
The process involves manufacturing reconstituted plates with electronic ball packages, which are tested and then stacked with a redistribution layer to reduce thickness, using a sequence of steps including placement on adhesive skins, resin molding, thinning, and redistribution layer formation to achieve a thinner 3D module structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If bare chips are stacked in a 3D electronic module, then the thickness is reduced, but the reliability of operation at high frequencies above 1 GHz cannot be ensured
Solution Approach 1:
The patent applies preliminary action by performing complete electrical testing of each chip at its operating frequency and temperature conditions before stacking. This advance testing identifies and eliminates defective chips, ensuring that only reliable chips are assembled into the 3D module. The testing is conducted on individual chips before they are integrated, allowing for quality assurance without compromising the final module thickness.
Solution Approach 2:
The patent changes the testing parameters by conducting electrical tests at the actual operating frequency (above 1 GHz) and temperature conditions of the chip. This ensures that reliability is verified under realistic operating conditions rather than at lower test frequencies, thereby ensuring high-frequency performance without requiring thicker packaging.
2Reliability
If encapsulated chips with packages are used, then the reliability of testing at high frequencies is improved, but the thickness of the 3D module increases
Solution Approach 1:
The patent extracts the essential function of packaging (which is to enable testing) while eliminating the bulk of the package structure that increases thickness. By testing chips individually at high frequencies before stacking, the patent removes the need for thick protective packaging during operation, achieving both high-frequency testing capability and reduced module thickness.
Solution Approach 2:
The patent treats the temporary packaging or mounting structure used during testing as a disposable element that serves its purpose only during the testing phase. After verification, these temporary structures are removed or left in non-critical positions, allowing the final stacked module to achieve minimal thickness while maintaining reliability through pre-verified chips.
3Reliability
If individual chip testing is performed before stacking, then the reliability of each chip is ensured, but the productivity of collective manufacturing is reduced
Solution Approach 1:
The patent merges individual chip testing with the collective manufacturing process by implementing testing as an integrated step in the wafer-level or batch processing sequence. Rather than testing each chip separately after complete assembly, the method combines testing with the stacking process itself, allowing multiple chips to be tested and stacked in a coordinated manner that maintains high throughput while ensuring quality.
Solution Approach 2:
By performing testing at the wafer level or in batches before final stacking, the patent enables preliminary quality assurance that eliminates the need for rework or rejection of entire modules. This advance testing at an intermediate stage allows for efficient sorting and stacking of verified chips, maintaining manufacturing productivity while ensuring reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures reliable operation at high frequencies and temperatures while significantly reducing the thickness of the 3D modules, making them more efficient and compact.
Implementation Method 1
molding of the electronic packages in the resin and polymerization of the resin
Data Source
Figure 1a~1c
Figure 2A1~2F1
Figure 3A2~3F2
AI summary
The invention relates to a method for the collective fabrication of 3D electronic modules, each 3D electronic module comprising a stack of at least two surface-mountable ball-bearing electronic packages, tested at their operating temperature and frequency. It comprises: - a step of manufacturing reconstituted boards, each reconstituted board being manufactured according to the following substeps in the following order: ∘ A1) the electronic packages are placed on a first adhesive skin with the ball side facing up, ∘ B1) molding of the electronic packages in the resin and polymerization of the resin to obtain the intermediate board, o C1) thinning of the intermediate board on the face of the intermediate board opposite the balls, ∘ D1) removal of the first adhesive skin and placement of the intermediate board on a second adhesive skin, with the side opposite the balls facing up, ∘ E1) thinning of the intermediate board on the face facing up to the balls.∘ F1) formation of a redistribution layer on the ball side, ∘ G1) removal of the second sticky skin to obtain a reconstituted plate with a thickness less than the original thickness of the electronic packages, - several reconstituted plates having been obtained at the end of the previous sub-steps, stacking of the reconstituted plates, - cutting of the stacked reconstituted plates to obtain 3D modules.