3D NAND Channel Structure With Higher Merging Point

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Solution Overview

Problem

The challenge in forming 3D NAND memory devices is the difficulty in balancing manufacturing throughput and process complexity due to the need for deep channel hole etching and selective epitaxial growth, which can result in device failure and less controllable BSG electrodes, especially with the existing side wall SEG method where the merging point of the channel layer is near the top of the sacrificial polysilicon layer.

Innovation Solution

A two-step channel layer filling process is employed to form an enhanced channel structure with a higher merging point, reducing the risk of channel layer breakage during post SEG oxidation, and two-side Boron doping is used to improve control over BSG electrode formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If deep channel hole etching is performed to achieve 3D NAND structure, then memory density is improved, but manufacturing complexity and device failure risk increase

Engineering Contradiction:

Improvememory densityVSAvoidmanufacturing complexity

Core Design Contradiction:

Quantity of substanceVSDevice complexity

Solution Approach 1:

The channel layer formation is divided into two separate steps: first forming a initial channel layer, then forming a merged channel layer after sacrificial layer removal. This segmentation allows each step to be optimized independently, reducing the complexity of the overall deep etching process while achieving the required 3D NAND structure.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The initial channel layer is formed before sacrificial layer removal as a preliminary action. This preliminary channel layer provides structural support during the subsequent sacrificial layer removal process, preventing device failure while enabling the complex 3D structure to be formed.

Inventive Principle:

Principle #10Preliminary action

2Quantity of substance

If channel layer merging point is positioned near the top of sacrificial polysilicon layer to maximize density, then memory density is improved, but channel layer breakage risk increases

Engineering Contradiction:

Improvememory densityVSAvoidchannel layer integrity

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The initial channel layer is formed as a preliminary structure that extends to the top of the sacrificial layer. This preliminary channel layer acts as a support structure during sacrificial layer removal, preventing breakage of the merged channel layer even when the merging point is positioned at maximum density location.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The initial channel layer serves as a cushioning support structure formed beforehand. It provides mechanical support to the merged channel layer during the critical sacrificial layer removal process, preventing breakage and ensuring channel layer integrity while maintaining maximum memory density.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

3Ease of manufacture

If side wall SEG method is used to form BSG electrodes, then manufacturing process is simplified, but electrode controllability deteriorates

Engineering Contradiction:

Improveprocess simplicityVSAvoidelectrode controllability

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The BSG electrode formation is segmented into two distinct phases: first forming the initial channel layer that defines the electrode region, then forming the merged channel layer after sacrificial layer removal. This segmentation enables precise control over BSG electrode characteristics while maintaining manufacturing feasibility.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The initial channel layer is formed preliminarily to establish the BSG electrode formation region. This preliminary structure serves as a template that guides subsequent processing steps, enabling precise electrode controllability while keeping the overall manufacturing process manageable.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The enhanced channel structure effectively reduces the risk of channel layer breakage and improves the controllability of BSG electrodes, leading to more reliable and efficient fabrication of 3D NAND memory devices.

Implementation Method 1

forming a selective epitaxial growth layer in the horizontal trench

Methodology Applied

Scientific EffectSelective epitaxial growth: Epitaxy

Implementation Method 2

performing an implantation process to an upper surface of the substrate to form a doped upper substrate

Methodology Applied

Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS11751385B2Three-dimensional memory devices and fabricating methods thereof

Publication Date: 2023.09.05 YANGTZE MEMORY TECH CO LTD

AI summary

A method for forming a 3D memory device is provided. The method comprises forming a sacrificial layer on a substrate, forming an alternating dielectric stack on the sacrificial layer, forming a plurality of channel holes vertically penetrating the alternating dielectric stack and the sacrificial layer, and forming a first channel layer in each channel hole. The method further comprises forming a second channel layer on the first channel layer in each channel hole, such that a merging point of the second channel layer is higher than a bottom surface of the alternating dielectric stack. The method further comprises removing the sacrificial layer to form a horizontal trench, and forming a selective epitaxial growth layer in the horizontal trench.