3D NAND Insulating Layer Structure for Leakage Current Control
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Solution Overview
Problem
In three-dimensional NAND flash memory devices, the electrical insulation between conductive layers and semiconductor layers is compromised due to high electric field strengths, leading to leakage currents and reduced device performance, especially when the distance between these layers decreases.
Innovation Solution
Incorporating a third insulating layer with a higher dielectric constant than the second insulating layer, positioned under the conductive layer, to distribute the electric field and reduce the electric field strength, while also using radical oxidation to enhance oxide film thickness and stability at lower temperatures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the distance between conductive layer and semiconductor layer is decreased to improve integration, then device integration is improved, but electrical insulation deteriorates due to high electric field strength causing leakage currents
Solution Approach 1:
A third insulating layer is introduced between the conductive layer and the semiconductor layer to act as an intermediary. This intermediate layer has a higher dielectric constant than the second insulating layer, allowing it to effectively distribute and reduce the electric field strength in the region between the conductive layer and semiconductor layer, thereby preventing leakage currents while maintaining small spacing for high integration
Solution Approach 2:
The dielectric constant parameter of the insulating layer is changed by selecting a material with higher dielectric constant for the third insulating layer compared to the second insulating layer. This parameter change enables the third layer to provide better electric field distribution and insulation performance at reduced distances, solving the contradiction between integration and electrical insulation
2Temperature
If conventional oxidation methods are used to form oxide films, then oxide films can be formed, but oxide film thickness and stability are insufficient at lower temperatures
Solution Approach 1:
Radical oxidation is employed instead of conventional thermal oxidation. This method uses highly reactive oxygen radicals to achieve rapid and thorough oxidation of the semiconductor surface, forming oxide films with sufficient thickness and high stability even at lower processing temperatures, thus resolving the contradiction between low temperature processing and oxide film quality
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves electrical insulation, reduces leakage currents, and enhances the overall performance and reliability of the semiconductor device by distributing the electric field and maintaining insulation effectiveness even at lower temperatures.
Implementation Method 1
a third insulating layer surrounded by the second insulating layer in the first cross section and containing a metal element and oxygen (O)... improves electrical insulation, reduces leakage currents, and enhances the overall performance and reliability of the semiconductor device by distributing the electric field
Implementation Method 2
using radical oxidation to enhance oxide film thickness and stability at lower temperatures
Data Source
AI summary
A semiconductor device of embodiments includes: a semiconductor layer containing silicon (Si); a first insulating layer provided in a first direction of the semiconductor layer; a second insulating layer surrounded by the semiconductor layer in a first cross section perpendicular to the first direction and containing silicon (Si) and oxygen (O); a third insulating layer surrounded by the second insulating layer in the first cross section and containing a metal element and oxygen (O); and a conductive layer surrounded by the first insulating layer in a second cross section perpendicular to the first direction, provided in the first direction of the third insulating layer, and spaced from the semiconductor layer.


