3D NAND Memory String Structure Without Wet Etching Damage
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Solution Overview
Problem
Conventional semiconductor storage devices face challenges in miniaturization due to increased costs and physical limitations, such as the removal of memory gate insulation layers during the diluted fluorinated acid process, which affects the formation and reliability of three-dimensional memory cells.
Innovation Solution
A non-volatile semiconductor storage device with a plurality of memory strings, each comprising columnar semiconductor layers, charge storage layers, and conductive layers, where the memory cells are formed by aligning and filling holes with charge storage layers and semiconductor materials without the need for a wet etching process, ensuring stable insulation and reduced contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If memory gate insulation layers are subjected to diluted fluorinated acid process, then columnar semiconductors can be formed, but the memory gate insulation layers are removed by etching
Solution Approach 1:
A new insulation layer is introduced as an intermediary between the memory gate insulation layer and the etching process. This intermediate layer acts as a protective barrier that prevents the diluted fluorinated acid from contacting and removing the memory gate insulation layer, while still allowing the etching process to form the desired columnar semiconductor structures.
Solution Approach 2:
The patent applies preliminary protective action by forming the new insulation layer before the etching process. This pre-formed layer anticipates and counteracts the harmful etching effect, preventing the removal of the memory gate insulation layer before it can occur.
2Ease of manufacture
If conventional wet etching process is used, then manufacturing process is simple, but contact resistance increases and insulation layers are damaged
Solution Approach 1:
The new insulation layer serves as a mediator that enables the etching process to proceed while protecting against its harmful effects. It allows the manufacturing process to remain relatively simple while preventing the increase in contact resistance and damage to insulation layers that would otherwise occur.
3Quantity of substance
If memory cells are three-dimensionally disposed, then storage capacity increases, but manufacturing complexity increases
Solution Approach 1:
The manufacturing process is segmented into distinct steps: first forming the memory gate insulation layers, then forming the new insulation layers, and finally performing the etching process to create columnar semiconductors. This segmentation breaks down the complex three-dimensional manufacturing into manageable stages, reducing overall process complexity while maintaining high storage capacity.
Solution Approach 2:
The patent performs preliminary actions by forming both the memory gate insulation layers and the new insulation layers before the etching process. This preliminary preparation simplifies the subsequent etching step and ensures that all protective structures are in place before three-dimensional features are created.
Data Source
AI summary
A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells.