3D NAND Memory Pass Voltage Control for Disturb Suppression

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Solution Overview

Problem

Three-dimensional (3D) NAND flash memory devices face challenges in suppressing program disturb and pass disturb, which affect the performance and reliability of the memory cells.

Innovation Solution

The method involves applying different pass voltages on unselected word lines to minimize the shift in threshold voltages of unselected memory cells, thereby reducing program disturb and pass disturb. This is achieved by determining specific maximum pass voltages for different groups of unselected word lines based on the measured shifts in threshold voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single pass voltage is applied to all unselected word lines, then the programming operation can be simplified, but threshold voltage shifts in unselected memory cells increase causing program disturb and pass disturb

Engineering Contradiction:
Improveprogramming operation complexityVSAvoidmemory cell reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The unselected word lines are divided into multiple groups (first group and second group), and different pass voltages are applied to each group. This segmentation allows tailored voltage application to minimize threshold voltage shifts in unselected memory cells while maintaining manageable programming complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different pass voltages are applied to different groups of unselected word lines based on their specific threshold voltage shift characteristics. This local quality approach ensures that each group receives the appropriate voltage level to suppress program disturb and pass disturb without unnecessarily increasing overall system complexity.

Inventive Principle:
Principle #3Local quality

2Reliability

If higher pass voltage is applied to suppress program disturb, then unselected memory cells connected to the selected word line are protected, but pass disturb on other unselected memory cells increases

Engineering Contradiction:
Improveprogram disturb suppressionVSAvoidpass disturb
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The pass voltage parameter is varied across different groups of unselected word lines. By changing the voltage parameter based on the specific group and its susceptibility to program disturb or pass disturb, the method optimizes protection against both types of disturbance without exacerbating either.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

Different voltage levels are applied to different groups of unselected word lines based on their local characteristics and susceptibility to disturbance. This allows targeted suppression of program disturb in some groups while minimizing pass disturb in others.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12272404B2Programming for three-dimensional NAND memory
Publication Date: 2025.04.08 YANGTZE MEMORY TECH CO LTD
  • US12272404B2 patent drawing
  • US12272404B2 patent drawing
  • US12272404B2 patent drawing

AI summary

A memory device includes selected word lines coupled to first memory cells, a first group of unselected word lines coupled to second memory cells, a second group of unselected word lines coupled to third memory cells; and a peripheral circuit coupled to the selected word lines, the first group of unselected word lines, and the second group of unselected word lines. The peripheral circuit is configured to apply program voltages on the selected word lines, apply first pass voltages on the first group of unselected word lines; and apply second pass voltages on the second group of unselected word lines. A first maximum value of the first pass voltages is different from a second maximum value of the second pass voltages.