3D NAND Word-Line Ramp Timing to Preserve Read Window Margins

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Solution Overview

Problem

The increasing density of memory cells in NAND flash memory devices leads to reduced read window margins (RWM) due to programming disturbances, especially in 3D NAND flash memory, which affects the accuracy of data reading.

Innovation Solution

A programming method that applies programming voltages to a selected word line and adjacent word lines with different ramp timings in multiple phases, enhancing the channel potential and reducing programming disturbances.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cell density is increased, then storage capacity is improved, but read window margin is reduced due to programming disturbances

Engineering Contradiction:
Improvememory cell densityVSAvoidread window margin
Core Design Contradiction:
Quantity of substanceVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by pre-charging adjacent word lines before the programming operation. The method includes applying a first pass voltage to a first word line and a second pass voltage to a second word line before the main programming pulse. This preliminary voltage application stabilizes the threshold voltage distributions of adjacent memory cells, preventing programming disturbances and maintaining read window margins even as memory cell density increases.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If programming voltage is applied to improve programming speed, then productivity is improved, but programming disturbance increases reducing read window margin

Engineering Contradiction:
Improveprogramming speedVSAvoidread window margin
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent segments the programming operation into multiple phases with different voltage applications. Instead of applying a single high programming voltage, the method divides the process into: (1) applying a first pass voltage to a first word line, (2) applying a second pass voltage to a second word line, and (3) applying the main programming pulse. This segmentation allows the system to achieve programming speed while minimizing programming disturbances to adjacent cells, thereby preserving read window margins.

Inventive Principle:
Principle #1Segmentation

3Measurement precision

If pass voltage is applied to adjacent word lines, then programming disturbance is reduced, but programming time increases

Engineering Contradiction:
Improveread window marginVSAvoidprogramming time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent employs periodic action by applying pass voltages to adjacent word lines in alternating sequences during the programming operation. The method applies voltage to the first word line, then to the second word line, creating a periodic voltage application pattern. This periodic action stabilizes threshold voltage distributions and reduces programming disturbances while maintaining efficient programming timing through structured voltage sequencing.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method improves read window margins, ensuring accurate data reading by stabilizing the threshold voltage distributions and reducing programming time.

Implementation Method 1

applying a programming voltage on a selected word line; applying a first pass voltage on a first word line adjacent to the selected word line; and applying a second pass voltage on a second word line adjacent to the selected word line

Methodology Applied
Scientific EffectVoltage application: Electric Field

Data Source

PatentUS20250273269A1Programming methods for memory devices, memory devices and memory systems
Publication Date: 2025.08.28 YANGTZE MEMORY TECH CO LTD
  • US20250273269A1 patent drawing
  • US20250273269A1 patent drawing
  • US20250273269A1 patent drawing

AI summary

Examples of the present application disclose a programming method for a memory device, a memory device and a memory system. The programming method includes: applying a programming voltage on a selected word line; applying a first pass voltage on a first word line adjacent to the selected word line; and applying a second pass voltage on a second word line adjacent to the selected word line, wherein the first pass voltage and the second pass voltage include at least two ramp phases, and the first pass voltage and the second pass voltage have different ramp timings in at least one ramp phase among other ramp phases after the first ramp phase, and the ramp timing is the timing when the voltage value starts to ramp up from a certain voltage value.