3D NAND String Memory Device With Segmented Word Lines
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Solution Overview
Problem
3D stack memory devices face increased word line capacitance due to their repeated conductor and dielectric stacked structure, which hinders the achievement of high element density and reduced cost per cell.
Innovation Solution
The integration of a thin film transistor (TFT) structure, comprising alternately stacked semiconductor and oxide layers, is used to control the on/off state of word lines, thereby reducing word line capacitance. This is achieved through a manufacturing method involving the formation of specific through holes, deposition of charge and channel layers, and the use of dielectric structures to fill these holes, ultimately connecting metal layers to semiconductor layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a 3D stack memory device with repeated conductor and dielectric stacked structure is used to increase memory capacity, then memory capacity and element density are improved, but word line capacitance increases
Solution Approach 1:
The patent segments the continuous conductor stack into discrete, isolated conductor segments by introducing dielectric material between them. This segmentation prevents capacitive coupling between adjacent conductor layers, reducing overall word line capacitance while maintaining the 3D stacked structure for high memory capacity.
Solution Approach 2:
The patent introduces an intermediary dielectric structure between conductor layers that would otherwise be in direct contact. This intermediary material acts as an electrical insulator, preventing charge accumulation and reducing capacitance between adjacent word lines while allowing the stacked configuration to persist.
2Quantity of substance
If more conductor and dielectric layers are stacked to increase density, then element density improves, but device complexity increases
Solution Approach 1:
The patent merges multiple functions into the dielectric structure: it serves as both the insulating material between conductor layers and as a structural element that defines the segmented conductor regions. This consolidation reduces the number of separate components needed while achieving high element density.
Solution Approach 2:
The dielectric material performs multiple functions simultaneously: electrical insulation between conductors, structural support for the stacked architecture, and definition of active memory regions. This multi-functionality reduces overall device complexity despite the multi-layer stacked configuration.
Data Source
AI summary
A memory device including a substrate, at least one first stacked structure and at least one second stacked structure disposed on the substrate is provided. The first stacked structure includes a plurality of alternately stacked metal layers and oxide layers. The second stacked structure is disposed adjacent to the first stacked structure and includes a plurality of alternately stacked semiconductor layers and oxide layers. The metal layers of the first stacked structure are connected to the semiconductor layers of the second stacked structure.