Solid-State Devices TRIZ Cases

Small pixel sensor arrays bonded through silicon interposers create large X-ray detectors without stitching, improving yield and wafer use.

Blue reflective and transmissive layers guide sub-pixel color conversion to improve display optical efficiency and resolution.

A self-aligned backside contact directly links MRAM to transistor source/drain regions, cutting distance, reducing overlay error, and protecting yield.

An overlap pattern tied to OLED gate lines adds parallel conduction paths, cutting wiring resistance for faster driving and narrower bezels.

Using backside power rails frees front-side signal space and lowers mesh resistance and capacitance in scaled semiconductor structures.

A silicon on-chip lens narrows and condenses incident light onto a pinhole to boost infrared sensitivity while reducing light loss and flare.

A multilayer pad with transparent conductive edge coverage improves adhesion and helps prevent cracks and layer separation in display panels.

Bridge and electrode patterns create backup current paths so sub-pixels still emit light when LEDs are missing between connection electrodes.

Pore-collapse encapsulation in micro/mesoporous hosts protects fluorescent semiconductor nanocrystals from moisture, oxygen, light, and heat.

Interlocking recesses and adhesive protrusions strengthen CIS chip-to-glass bonding and prevent detachment during high-temperature testing.

Reflective blocks on opposing substrates redirect OLED subpixel light into transmissive regions, reducing leakage and improving aperture use.

A recessed multi-color micro-LED package balances DEP forces to place RGB chips selectively, enabling smaller pixels and faster display assembly.

By extending the oxide semiconductor beyond scan-line wiring to overlap the emitter, this pixel structure raises aperture ratio for high-definition displays.

Gradually shrinking vias along each pixel-driving column balance data-line voltage signals and reduce long-range brightness unevenness.

Paired sense amplifiers use a neighbor bit line local data bus so pre-charging and verify logic can overlap, cutting non-volatile memory sensing time.

Layered OLED emission and wavelength conversion balance full-color output with more consistent efficiency and color reproducibility.

A graded multilayer electrode buffers thermal expansion mismatch with passivation layers to limit microcracks, corrosion, and antenna failure.

Side and corner trenches guide fillet layer fill in stacked semiconductor packages, limiting edge protrusion to reduce cracks and reliability loss.

Stacking the signal line and pedestal in different layers improves adhesion, cuts conduction failures, and supports finer LCD sub-pixels.

A same-type channel and source-drain doping scheme cuts gate leakage while preserving capacitance and yield in scaled IC decoupling capacitors.

Nested recesses around an OLED module hole guide sealing layers to block moisture and oxygen while preserving panel strength and reliability.

A dual SOH hard mask stack vents organic byproducts to reduce thermal stress while improving etch selectivity in semiconductor processing.

A recessed charge storage layer lowers gate stack height, eases CMP, and helps embedded flash match threshold voltages with on-chip transistors.

A concave-convex planarization layer increases induction electrode capacitance for more accurate under-display fingerprint sensing without sacrificing PPI.

A segmented charge storage electrode and graded insulating layer enable full depletion, suppress kTC noise, and improve image quality.

Dopant implantation expands ILD to seal FinFET air gaps near source/drain contacts, lowering capacitance while blocking conductive shorts.

Overlapping side wire segments with different widths absorb locating errors, stabilizing display panel connections and improving yield.

Different upper and lower interface roughness in an intermediate layer improves lattice match, relieves stress, and boosts light extraction.

A strain-relieving layer enables monolithic blue, green, and red emission while easing lattice mismatch and LED alignment limits in displays.

Matched positioning structures align the color conversion layer with light-emitting areas to prevent optical crosstalk in display panels.

A barrier layer covering the TFT active layer and gate electrode blocks water and oxygen intrusion, improving display panel reliability.

Fuse-programmed training aligns master and internal data output timing across memory devices to prevent PVT-driven I/O errors.

Backside recessing and spacer deposition create air-gap isolation between adjacent fins, preventing gate and source/drain merging in dense ICs.

Opposite-facing micro LED arrays on a shared substrate cut double-sided panel thickness and improve flatness while limiting optical interference.

An organic electron control compound replaces metal oxides to improve electron transport while reducing phase separation and interface mixing.

Curve-based pixel openings and doped dielectric layers confine lattice-mismatch dislocations away from active image sensor regions.

A shifted hard-bit read point and single soft read cut extra sensing overhead while preserving ECC reliability in non-volatile memory.

A two-layer AlGaAs removal stack uses differential etching to separate the epitaxial layer cleanly and prevent substrate surface bonding.

Openings through overlapping insulating layers vent fabrication outgases, reducing defects and protecting light emitting element reliability.

Simultaneous epitaxial growth of LEDs and confinement walls improves sub-pixel uniformity, limits crosstalk, and captures parasitic deposits.

A partially covering light-adjusting layer scatters edge-concentrated LED light to improve emission uniformity without sacrificing output.

Low-temperature AlN buffer and compensation layers counter substrate bow and CTE strain, protecting fragile MCT during device integration.

A side-by-side pixel layout keeps the active material layer out of the emission path, simplifying fabrication while preserving light output.

A shared contact hole and connection pattern link conductive layers in a display stack, cutting mask steps and fabrication complexity.

Multiple interleaved placement passes spread LED performance variation across the substrate, improving uniformity without sacrificing throughput.

Reducing electrode contact area through phase change layer thickness control lowers programming current and speeds PCM switching.

Combining narrow-spectrum and broad-spectrum LEDs with elastomer tuning enables white light with adjustable CCT for changing circadian and commercial lighting needs.

RGB meta-photodiodes replace color filters to improve light use, preserve resolution, and support autofocusing in image sensors.

Extending the transfer gate through the element isolation pattern increases active-area layout freedom while preserving pixel isolation in image sensors.

Frame glue seals switching and light-emitting substrates in a vacuum cavity to improve LED alignment, moisture resistance, and light output.