MOSFET Gate Contact Segmentation for Current Crowding

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Solution Overview

Problem

In MOSFET devices driving inductive loads, non-uniform gate resistance leads to localized current crowding and peak current density, causing overheating and potential damage during on-to-off-state transitions.

Innovation Solution

The introduction of multiple metal contacts along the width of the gate terminal reduces gate resistance by distributing current evenly across the device, achieved through the deposition of metal contacts and wire traces that parallel or short gate resistances, thereby reducing peak current density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single gate contact is used at one end of the gate terminal, then the device structure is simple, but non-uniform gate resistance causes localized current crowding and peak current density

Engineering Contradiction:
Improvegate contact structureVSAvoidcurrent distribution uniformity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The gate terminal is divided into multiple segments with separate gate contacts at different positions along the gate terminal width. This segmentation distributes the gate control across multiple contact points, reducing the effective gate resistance and eliminating localized current crowding that occurs with a single end-contact configuration.

Inventive Principle:
Principle #1Segmentation

2Reliability

If multiple gate contacts are distributed along the gate terminal width, then current distribution uniformity is improved, but device complexity increases

Engineering Contradiction:
Improvecurrent distribution uniformityVSAvoidgate contact structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate terminal is divided into multiple segments with separate gate contacts at different positions along the gate terminal width. This segmentation distributes the gate control across multiple contact points, reducing the effective gate resistance and eliminating localized current crowding that occurs with a single end-contact configuration.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively distributes current across the MOSFET device, reducing peak current density and preventing overheating, allowing the device to operate at higher voltages without damage.

Implementation Method 1

a gate resistance of the gate terminal increases with a distance from the driver circuitry. Thus, at a remote end of gate terminal, a gate resistance is greater than at an end closest to the driver circuitry

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Implementation Method 2

depositing a plurality of metal contacts along a width of a gate terminal of the FET device and forming a wire trace to contact each of the plurality of metal contacts to reduce a gate resistance along the width of the gate terminal

Methodology Applied
Scientific EffectParallel Conduction: Conduction (electrical)

Implementation Method 3

The substrate includes an oxide layer having a plurality of thick oxide regions and a plurality of thin oxide regions

Methodology Applied
Scientific EffectDielectric Isolation: Dielectric

Data Source

PatentUS7932577B2Circuit device and method of forming a circuit device having a reduced peak current density
Publication Date: 2011.04.26 SILICON LABORATORIES INC
  • US7932577B2 patent drawing
  • US7932577B2 patent drawing
  • US7932577B2 patent drawing

AI summary

In a particular embodiment, a method of forming a field effect transistor (FET) device having a reduced peak current density is disclosed. The method includes forming a field effect transistor (FET) device on a substrate. The FET device includes a drain terminal, a source terminal, a gate terminal, and a body terminal. The method further includes depositing a plurality of metal contacts along a width of a gate terminal of the FET device and forming a wire trace to contact each of the plurality of metal contacts to reduce a gate resistance along the width of the gate terminal.