OLED Gate Line Overlap Structure for Lower Wiring Resistance
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Solution Overview
Problem
As the resolution and size of organic light emitting displays (OLEDs) increase, the resistance of their wirings also increases, making it difficult to cope with high-speed driving requirements.
Innovation Solution
The implementation of an overlap pattern that overlaps or is adjacent to the wiring with increased resistance, connected to the wiring to reduce resistance and improve driving speed, utilizing a structure with specific thin film transistors, gate lines, and overlap patterns formed of materials like Mo/Ti, MoTi/Cu/MoTi, or Ti/Al/Ti, connected through contact holes to the gate lines and extension lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the resolution and size of OLED are increased, then image quality is improved, but wiring resistance increases
Solution Approach 1:
The gate line is divided into multiple segments with overlap patterns positioned between them. Each overlap pattern acts as an independent conductive element that can be connected to adjacent gate line segments, allowing the gate line to be segmented into multiple parallel conduction paths that reduce overall resistance.
Solution Approach 2:
The overlap pattern serves as an intermediary conductive element between adjacent gate line segments. By positioning the overlap pattern to overlap both gate line segments and providing connection contacts, it mediates the electrical connection between segments while reducing the resistance of the overall gate line structure.
2Device complexity
If wiring resistance is increased, then device complexity is reduced, but driving speed decreases
Solution Approach 1:
The overlap pattern provides a dynamic electrical connection between gate line segments. The overlapping structure allows for flexible connection configurations where the electrical path can adapt between direct gate line connection and connection through overlap pattern, enabling optimization of driving speed without fixed structural constraints.
Solution Approach 2:
The resistance parameter of the gate line is changed by introducing the overlap pattern with different material composition and cross-sectional area. The overlap pattern can be formed with materials having lower resistivity or larger cross-section than the gate line, thereby changing the overall resistance parameter of the gate line structure to achieve faster driving speeds.
3Speed
If overlap pattern is added to reduce resistance, then driving speed is improved, but device complexity increases
Solution Approach 1:
The overlap pattern is merged with the existing gate line structure by positioning it to overlap the gate line and forming electrical connections through the insulating layer. This merging approach integrates the resistance-reducing function into the existing gate line without requiring completely separate wiring structures, thereby limiting the increase in device complexity.
Solution Approach 2:
The overlap pattern serves multiple functions: it reduces gate line resistance by providing an additional conduction path, acts as a connection element between gate line segments, and can serve as a structural support element. This multi-functionality reduces the need for additional dedicated components, thereby limiting the increase in device complexity while achieving improved driving speed.
Data Source
AI summary
A display device includes a substrate, first thin film transistors and second thin film transistors. A gate line is formed integrally with a first gate electrode of the first thin film transistors. An isolation insulating layer is disposed over a first gate insulating layer of the first thin film transistors. A second active layer of the second thin film transistors is disposed on the isolation insulating layer. An overlap pattern is disposed on the isolation insulating layer to be connected to the gate line. The overlap pattern includes a first overlap pattern disposed on the isolation insulating layer and formed of substantially the same material as the second active layer. A second overlap pattern is disposed on the first overlap pattern.