Semiconductor Light Emitting Device Planarization via Photoresist Etching

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Solution Overview

Problem

The manufacturing costs of semiconductor light emitting devices are high due to complex processes and equipment requirements, particularly in achieving planarization without separate physical planarization methods like chemical mechanical polishing (CMP).

Innovation Solution

A method involving the formation of light emitting cells on a substrate, followed by sequential planarization layers with photoresist and dry etching to expose and remove portions between cells, repeated to achieve a flat surface without additional equipment, thereby reducing manufacturing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional physical planarization methods like chemical mechanical polishing (CMP) are used, then planarization is achieved, but manufacturing costs increase and process complexity increases

Engineering Contradiction:
Improvesurface planarizationVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent replaces the mechanical CMP process with a chemical etching process using photoresist and etching solution. The photoresist pattern serves as a mask to selectively remove material through chemical reaction, eliminating the need for mechanical polishing equipment and reducing manufacturing costs while achieving comparable planarization results

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the planarization approach from mechanical removal (CMP) to chemical removal (etching). By controlling etching parameters such as photoresist thickness, etching solution concentration, and exposure time, the process achieves effective planarization without requiring expensive CMP equipment

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If conventional physical planarization methods like chemical mechanical polishing (CMP) are used, then planarization is achieved, but device complexity increases

Engineering Contradiction:
Improvesurface planarizationVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent combines the planarization function with the existing photolithography process by using the photoresist pattern as both the lithographic mask and the etching mask. This integration eliminates the need for separate CMP process equipment and reduces overall process complexity while achieving the desired planarization

Inventive Principle:
Principle #5Merging (Combining)

3Manufacturing precision

If photoresist and dry etching are repeated multiple times, then surface flatness is improved, but manufacturing time increases

Engineering Contradiction:
Improvesurface flatnessVSAvoidmanufacturing efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent applies photoresist and etching processes selectively only in regions where planarization is needed, rather than processing the entire wafer surface uniformly. The photoresist is applied and patterned to cover only the areas requiring planarization, reducing unnecessary processing steps and time

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively flattens the semiconductor surface without requiring separate physical planarization processes, thereby reducing manufacturing costs and improving efficiency in producing semiconductor light emitting devices.

Implementation Method 1

soft baking the photoresist

Methodology Applied
Scientific EffectSoft baking: Heating

Implementation Method 2

dry etching the second planarization layer to a predetermined depth

Methodology Applied
Scientific EffectDry etching: Plasma

Data Source

PatentUS11264532B2Manufacturing method of semiconductor light emitting device
Publication Date: 2022.03.01 SAMSUNG ELECTRONICS CO LTD
  • US11264532B2 patent drawing
  • US11264532B2 patent drawing
  • US11264532B2 patent drawing

AI summary

Provided a manufacturing method of a semiconductor light emitting device including forming a plurality of light emitting cells that are separated on a first substrate, forming a first planarization layer by providing an insulating material on the plurality of light emitting cells, forming a second planarization layer by providing a photoresist on the first planarization layer to have a flat upper surface, and soft baking the photoresist, and dry etching the second planarization layer to a predetermined depth to expose a portion of the first planarization layer provided on the plurality of light emitting cells, and a portion of the second planarization layer remaining between the plurality of light emitting cells on the first planarization layer, wherein forming the second planarization layer and dry etching are repeated at least once to remove the portion of the second planarization layer provided between the plurality of light emitting cells.