Pillar Channel Protrusion in 3D NAND Source Line Connection
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Solution Overview
Problem
Connecting pillar-shaped channels in three-dimensional nonvolatile memory devices to source lines is challenging due to the coverage of memory layers, which complicates electrical conduction and manufacturing processes.
Innovation Solution
The semiconductor memory device design includes a stacked body with alternately layered dielectric and conductive layers, where pillar-shaped channels protrude into a conductive layer, and a sacrificial layer is used to form source lines by selectively removing the memory layers at the channel ends, allowing for stable electrical connection without requiring complex dielectric protection layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a pillar-shaped channel is covered with a memory layer to form three-dimensional nonvolatile memory cells, then memory storage capability is improved, but connection to source lines becomes difficult
Solution Approach 1:
The conductive layer is segmented into multiple layers (first conductive layer and second conductive layer) with the channel penetrating through them at different positions. This segmentation allows the channel to establish electrical connections with source lines at multiple levels, solving the connection difficulty while maintaining memory storage capability.
Solution Approach 2:
The channel is designed to extend in the vertical dimension, penetrating through stacked conductive layers rather than remaining in a single plane. This vertical extension allows the channel to connect with source lines at different heights, enabling electrical connection while the memory layer covers the channel sidewalls for storage functionality.
2Reliability
If complex dielectric protection layers are used to protect the channel, then reliability is improved, but manufacturing process complexity increases
Solution Approach 1:
The conductive layers serve multiple functions: they act as source lines for electrical connection and simultaneously provide structural support and protection for the channel. This multi-functionality eliminates the need for separate complex dielectric protection layers, reducing manufacturing complexity while maintaining reliability.
Solution Approach 2:
The conductive layers inherently provide protection to the channel through their structural presence and electrical properties, without requiring additional dedicated protection structures. The channel and conductive layers form a self-protecting system that simplifies the overall device architecture.
3Length of moving object
If high-aspect-ratio etching is used to form deep channels, then channel depth is improved, but manufacturing throughput decreases
Solution Approach 1:
The channel penetrates through the conductive layers but does not require etching through the entire stacked body depth. The channel extends sufficiently to establish electrical connection with the source lines in the lower conductive layer, avoiding the need for excessive deep etching that would reduce throughput.
Solution Approach 2:
The conductive layers are formed with appropriate thickness and positioning before channel formation. This preliminary structuring allows shallower channel etching to achieve the required connection depth, improving manufacturing throughput while maintaining adequate channel depth for functionality.
Data Source
AI summary
According to one embodiment, a semiconductor memory device includes: a substrate; a first conductive layer arranged above the substrate; a stacked body arranged on the first conductive layer with a plurality of dielectric layers and a plurality of second conductive layers being alternately stacked; a pillar-shaped channel extending in a stacking direction of the stacked body, penetrating through the stacked body, and protruding into the first conductive layer; and a memory layer covering a side surface of the channel, in which a bottom surface of the channel and the side surface of the channel protruding into the first conductive layer are in contact with the first conductive layer, and in which the first conductive layer includes: an upper layer; and a lower layer having a protrusion penetrating through the upper layer.