Self-Aligned Backside MRAM Contact for Faster Source/Drain Linking

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Solution Overview

Problem

The existing semiconductor structures with magnetoresistive random access memory (MRAM) in the back side of a wafer face challenges in achieving close proximity to source/drain structures, leading to reduced device speed due to the great distance between MRAM and field effect transistor (FET) components in the back-end-of-the-line (BEOL) region.

Innovation Solution

A back side contact structure is developed that self-aligns with the source/drain structure of a transistor and the MRAM, directly connecting the MRAM's first electrode to the source/drain structure, ensuring vertical alignment and reducing overlay errors, thus enhancing device speed without compromising MRAM yield by preventing re-sputtering of the back side contact metal onto the MRAM.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If back side contact metal is deposited onto the MRAM, then electrical connection is established, but MRAM yield is compromised due to re-sputtering damage

Engineering Contradiction:
ImproveMRAM yieldVSAvoidre-sputtering damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A protective cap structure is formed over the MRAM stack before back side contact metal deposition. This cap prevents re-sputtering damage to the MRAM during subsequent metal deposition processes, thereby protecting MRAM yield while allowing electrical connections to be established

Inventive Principle:
Principle #10Preliminary action

2Speed

If MRAM is placed far from source/drain regions, then FET operation is maintained, but device speed is reduced due to great distance

Engineering Contradiction:
Improvedevice speedVSAvoiddistance between MRAM and source/drain
Core Design Contradiction:
SpeedVSLength of stationary object

Solution Approach 1:

The back side contact structure extends vertically through the substrate thickness, allowing MRAM to be positioned on the back side while source/drain structures remain on the front side. This vertical arrangement in the third dimension reduces the lateral distance between components, improving device speed without compromising FET operation

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Manufacturing precision

If self-aligned back side contact structure is implemented, then overlay error is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improveoverlay errorVSAvoidstructure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The back side contact structure is designed to be self-aligned with both the source/drain structures and the MRAM electrode through integrated formation processes. The cap structure and contact structures are formed in a coordinated manner, reducing overlay errors while managing manufacturing complexity through process integration

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20240057345A1MRAM integration with self-aligned direct back side contact
Publication Date: 2024.02.15 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20240057345A1 patent drawing
  • US20240057345A1 patent drawing
  • US20240057345A1 patent drawing

AI summary

A back side contact structure is provided that directly connects a first electrode of a MRAM, which is present in a back side of a wafer, to a source/drain structure of a transistor. The back side contact is self-aligned to the source/drain structure of the transistor as well as to the first electrode of the MRAM. The close proximity between the MRAM and the source/drain structure increases the speed of the device. MRAM yield is not compromised since no re-sputtering of back side contact metal onto the MRAM occurs.