3D NAND Select Cells for Groove-Free Memory String Control

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Solution Overview

Problem

The fabrication of 3D NAND flash memory devices is complicated by the need for openings or grooves in the stack structure, increasing process time and cost.

Innovation Solution

A memory system with a semiconductor layer and memory array, featuring memory strings connected by select cells with different threshold voltages, allowing selective control of memory strings using varying voltages to simplify processes and reduce costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If openings or grooves are made in the stack structure to control memory strings, then selective control of memory strings is achieved, but the fabrication process becomes complicated and process time increases

Engineering Contradiction:
Improveselective control of memory stringsVSAvoidfabrication process complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by utilizing different threshold voltage parameters of transistors to achieve selective control of memory strings. Instead of modifying the physical structure through grooves, the invention changes the electrical parameter (threshold voltage) of transistors to differentiate and control individual memory strings, thereby simplifying the fabrication process while maintaining selective control capability.

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If openings or grooves are made in the stack structure to control memory strings, then selective control of memory strings is achieved, but process cost increases

Engineering Contradiction:
Improveselective control of memory stringsVSAvoidprocess cost
Core Design Contradiction:
Ease of operationVSEase of manufacture

Solution Approach 1:

The invention reduces process cost by changing the threshold voltage parameter of transistors instead of performing additional fabrication steps like creating grooves. This parameter-based control method eliminates complex manufacturing steps, thereby reducing process cost while achieving the same selective control function.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If multiple transistors with different threshold voltages are used in select cells, then selective control of memory strings is enabled, but device structure becomes more complex

Engineering Contradiction:
Improveselective control capabilityVSAvoidselect cell structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by assigning different threshold voltage characteristics to specific transistors within select cells. Each transistor is designed with a particular threshold voltage property that enables it to respond to specific voltage levels, allowing selective control of memory strings through localized electrical property differentiation rather than structural complexity.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables selective control of memory strings, simplifying the manufacturing process and reducing costs by eliminating the need for complex grooving of stack structures.

Implementation Method 1

The select cell includes first transistors with a first threshold voltage and second transistors with a second threshold voltage, the first threshold voltage being different from the second threshold voltage

Methodology Applied
Scientific EffectThreshold voltage:

Data Source

PatentUS20250254881A1Memory and controlling method thereof, memory system and electronic device
Publication Date: 2025.08.07 YANGTZE MEMORY TECH CO LTD
  • US20250254881A1 patent drawing
  • US20250254881A1 patent drawing
  • US20250254881A1 patent drawing

AI summary

A memory, a controlling method thereof, a memory system and an electronic device are disclosed. The memory can include a semiconductor layer and a memory array disposed on the semiconductor layer. The memory array can include a plurality of memory strings connected with the same bit line. Each memory string can include a memory cell and a select cell connected on at least one side of the memory cell. The select cell can include a first kind of transistors with a first threshold voltage and a second kind of transistors with a second threshold voltage. The first kind of transistors can be connected with the second kind of transistors. The first threshold voltage can be different from the second threshold voltage. Different memory strings can be controlled to be on or off to realize selective controlling functions for a plurality of memory strings connected with the same bit line.