3D NAND Smart Verify Programming for Wordline Voltage Control
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Solution Overview
Problem
Existing memory programming techniques face challenges with optimal initial programming voltage variation across memory blocks and word lines, leading to overprogramming or reduced programming performance, exacerbated by smart verify operations on some wordlines and strings.
Innovation Solution
Implement a smart verify operation to acquire programming voltage information and adjust programming based on this information, optimizing the initial programming voltage for each wordline to reduce periodic overprogramming and improve reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a fixed initial programming voltage is used across all memory blocks and word lines, then device complexity is reduced, but manufacturing precision deteriorates due to overprogramming or reduced programming performance
Solution Approach 1:
The patent applies local quality by determining an optimal initial programming voltage separately for each word line based on its specific characteristics. The control circuitry performs smart verify operations on each word line to acquire its unique programming voltage information, allowing each word line to be programmed with locally optimized parameters rather than a global fixed voltage, thereby resolving the contradiction between device complexity and manufacturing precision.
Solution Approach 2:
The patent implements parameter changes by dynamically adjusting the initial programming voltage parameter for each word line based on feedback from smart verify operations. The system changes the voltage parameter from a fixed value to a variable value that adapts to each word line's characteristics, eliminating overprogramming while maintaining programming performance across different memory blocks and word lines.
2Productivity
If the initial programming voltage is increased to improve programming performance, then productivity is improved, but reliability deteriorates due to overprogramming of some memory cells
Solution Approach 1:
The patent applies feedback by implementing smart verify operations that monitor the programming status of each word line and provide feedback information about the optimal initial programming voltage. This feedback mechanism allows the system to adjust the programming voltage to achieve high programming performance while preventing overprogramming, thereby resolving the contradiction between productivity and reliability.
Solution Approach 2:
The patent implements preliminary action by performing smart verify operations before the main programming operation to determine the optimal initial programming voltage for each word line. This preliminary characterization allows the system to set appropriate voltage parameters in advance, ensuring both high programming performance and reliability without requiring high voltage increases that would cause overprogramming.
3Reliability
If smart verify operations are performed on all wordlines to optimize programming voltage, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the memory array into multiple word lines that can be independently characterized and programmed. The control circuitry performs smart verify operations on individual word lines or groups of word lines separately, acquiring programming voltage information for each segment. This segmentation approach allows reliable programming without requiring a fully complex centralized control system, as each word line can be optimized independently.
Data Source
AI summary
A memory device has control circuitry that is configured to perform a smart verify operation on the memory cells of a selected word line to acquire an initial programming voltage for programming subsequent word lines. Following completion of the smart verify operation, the control circuitry is configured to adjust a programming voltage by both a step size or one half of a step size and also an offset and then continue programming the memory cells of the selected word line.


