3D NAND Stacked Electrode Structure for Manufacturing Yield
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Solution Overview
Problem
Current 3D NAND flash memory manufacturing requires precise alignment and control of memory holes and isolation grooves, leading to challenges in increasing storage capacity and reducing equipment costs due to the need for massive investments in microfabrication technology.
Innovation Solution
The design includes a non-volatile memory device with a stacked electrode structure where semiconductor layers pierce through the electrode, with a memory film acting as a charge storage layer and link parts connecting to interconnections, allowing for a wider stacked electrode and reduced isolation grooves, enhancing manufacturing ease and storage capacity without increasing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If precise alignment and control of memory holes and isolation grooves is implemented, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The patent removes isolation grooves entirely from the structure, extracting the problematic element that required precise alignment control. This eliminates the need for complex alignment processes while maintaining manufacturing precision through the simplified structure where memory holes are formed without requiring precise positioning relative to isolation features.
Solution Approach 2:
Instead of forming isolation grooves first and then aligning memory holes to them (conventional approach), the patent inverts the sequence by forming memory holes first and then creating isolation structures between them. This reversal eliminates the alignment precision requirement while achieving the same isolation function.
2Quantity of substance
If stacked electrode width is increased, then storage capacity is improved, but aspect ratio increases leading to electrode breakage
Solution Approach 1:
By removing isolation grooves from the structure, the patent eliminates the stress concentration points that caused electrode breakage. This allows the stacked electrode to be widened for increased storage capacity without compromising structural integrity, as there are no narrow isolation regions creating weak points in the electrode.
3Device complexity
If isolation grooves are reduced or removed, then device complexity is improved, but manufacturing precision requirements worsen
Solution Approach 1:
The patent inverts the conventional sequence by forming memory holes first without requiring alignment to pre-formed isolation grooves, and then creating isolation structures between the memory holes. This inversion reduces device complexity by eliminating isolation grooves while actually improving manufacturing precision requirements, as the memory holes no longer need precise alignment control.
Data Source
AI summary
According to one embodiment, a non-volatile memory device includes a first stacked electrode provided above a underlying layer, a second stacked electrode juxtaposed with the first stacked electrode above the underlying layer, a plurality of first semiconductor layers piercing the first stacked electrode in a direction perpendicular to the underlying layer, and a second semiconductor layer piercing the second stacked electrode in a direction perpendicular to the underlying layer. The device further includes a memory film provided between the first stacked electrode and the first semiconductor layers, and between the second stacked electrode and the second semiconductor layer, and a link part provided between the underlying layer and the first stacked electrode, and between the underlying layer and the second stacked electrode. The link part is electrically connected to one end of each of the first semiconductor layers and one end of the second semiconductor layer.