3D NAND Staircase Stack Structure to Reduce Tier Deformation

The patent applies preliminary action by forming the conductive structures (control gates) before completing the stack formation process. Specifically, sacrificial structures are formed first, then conductive materials are deposited to replace them, establishing the control gate structures in advance. This preliminary formation of conductive structures prevents subsequent deformations in staircase regions during later processing steps, as the rigid conductive framework provides structural support that maintains tier dimensional accuracy throughout the remaining manufacturing process.

The patent applies parameter changes by modifying the sequence and timing of material deposition and structure formation parameters. Instead of conventional gate-last processing, the invention uses gate-forming processing where conductive structures are established at specific intermediate stages. This parameter change in the manufacturing sequence creates structural rigidity at critical points, preventing deformations that would otherwise occur when attempting high-density packing with conventional methods. The altered processing parameters enable tighter feature spacing while maintaining formation precision.