3D NAND Memory Programming to Reduce Word-Line Coupling
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Solution Overview
Problem
As memory devices evolve with increasing storage density, the coupling interference between word lines in 3D NAND structures becomes severe, reducing the read window margin and reliability due to the limitations of deep-hole etching technology.
Innovation Solution
A memory device design where a set of data is written separately to memory cells coupled to different word lines, with previously written data being read out and combined with new data to reduce coupling interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If deep-hole etching technology is used to increase storage density in 3D NAND structures, then storage density is improved, but coupling interference between word lines increases and read window margin decreases
Solution Approach 1:
The patent segments the programming operation into multiple stages: first programming even word lines, then odd word lines. This temporal segmentation allows interference between adjacent word lines to be minimized by separating their programming operations, thus maintaining read window margin while achieving high storage density through 3D NAND structures.
Solution Approach 2:
The patent applies preliminary action by performing verification reads between programming stages. After programming even word lines, a verification read is performed before programming odd word lines. This preliminary verification allows adjustment of programming parameters to compensate for interference effects, maintaining reliability in high-density 3D NAND structures.
2Productivity
If more word lines are programmed simultaneously to increase productivity, then programming speed is improved, but interference between word lines increases and reliability decreases
Solution Approach 1:
The patent segments the word line programming into separate even and odd groups that are programmed in alternating stages rather than simultaneously. This segmentation reduces the number of active word lines at any given time, minimizing coupling interference while maintaining acceptable programming throughput for high-density storage applications.
Solution Approach 2:
The patent employs periodic action through alternating programming of even and odd word line sets. After programming one set, the system performs verification and then programs the next set in a periodic cycle. This periodic approach manages interference by controlling the temporal overlap of programming operations across multiple word lines.
Data Source
AI summary
According to one aspect of the present disclosure, memory devices are provided. An example memory device may include a peripheral circuit coupled to word lines, each of which may be coupled to a corresponding memory cell in each memory string. The peripheral circuit may be configured to receive a set of write data including N pages of data. The peripheral circuit may be configured to execute a first program operation to write m pages of data included in the set of write data to memory cells of the memory strings coupled to a first word line. The peripheral circuit may be configured to execute a second program operation to write at least p pages of data included in the set of write data to memory cells of the memory strings coupled to a second word line. A sum of m and p may equal N.