3D Stacked Semiconductor Package Interconnects Using Shielding Layers
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Solution Overview
Problem
The challenge in semiconductor devices is to fit more electrical components within the same footprint size by effectively forming electrical interconnects between stacked components, which is a limiting factor in current 3-D semiconductor package structures.
Innovation Solution
A method for forming a 3-D stacked semiconductor package structure that includes a multi-layered substrate with conductive and insulating layers, where interconnect structures are formed from a shielding layer, allowing for both horizontal and vertical connections without increasing the package footprint, and encapsulant thickness variations to accommodate taller components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If components are stacked over each other to increase integration density, then the quantity of components per footprint is improved, but forming electrical interconnects between stacked components becomes more difficult and complex
Solution Approach 1:
The patent transitions from planar (2D) interconnect formation to three-dimensional (3D) interconnect structures. Conductive layers are formed at multiple levels and angles, including vertical vias and inclined conductors, enabling electrical connections between stacked components without increasing footprint. This dimensional expansion allows components to be interconnected in the vertical dimension while maintaining compact lateral dimensions.
Solution Approach 2:
The patent implements nested interconnect structures where conductive layers are embedded within insulating layers, and multiple conductive layers are stacked within a limited vertical space. The shielding layer is positioned between signal layers, creating a nested configuration that provides EMI shielding while maintaining compact interconnect structures. This nesting allows multiple interconnect functions to be integrated within the same spatial envelope.
2Reliability
If more conductive layers are added to provide vertical interconnects between stacked components, then electrical connectivity is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The shielding layer serves multiple functions simultaneously: it provides EMI shielding between stacked components, acts as a reference plane for signal integrity, and can be patterned to form interconnect structures. This multi-functionality reduces the need for separate dedicated shielding structures and interconnect layers, simplifying the overall manufacturing process while maintaining reliable electrical connectivity.
Solution Approach 2:
The patent combines the shielding function with the interconnect function by patterning the shielding layer to create conductive pathways. Instead of requiring separate shielding layers and separate interconnect layers, the same conductive material serves both purposes. This merging reduces the total number of manufacturing steps and material layers required.
Data Source
AI summary
A semiconductor device has a substrate and a first electrical component disposed over the substrate. An encapsulant is deposited over the first electrical component. A shielding layer is formed over the encapsulant. The shielding layer is patterned to form a conductive trace and a contact pad. A board-to-board (B2B) connector is disposed over the encapsulant and electrically coupled to the substrate by the conductive trace.