3D Pixel Capacitor Structure for High-Density Image Sensors
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Solution Overview
Problem
As pixel sizes in integrated chips decrease, planar capacitors struggle to maintain adequate capacitance, making it difficult to achieve high performance in image sensors due to limited surface area within the pixel regions.
Innovation Solution
Implementing three-dimensional (3D) capacitors within pixel regions of a pixel array, with electrodes extending parallel to the substrate surface and fingers perpendicular to it, increasing surface area without increasing footprint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If planar capacitors are used in pixel regions, then manufacturing is simple, but capacitance density is insufficient as pixel sizes decrease
Solution Approach 1:
The patent transitions from planar (2D) capacitor electrodes to three-dimensional (3D) capacitor structures with vertical extensions. The first and second electrodes are formed with vertical sides extending from the substrate surface, creating a 3D configuration that increases capacitance density without occupying additional pixel region area. This dimensional change allows the capacitor to store more charge within the same footprint.
2Productivity
If pixel sizes are reduced to increase pixel array density, then more pixels fit on the chip, but available surface area for capacitors decreases
Solution Approach 1:
By forming electrodes with vertical sides that extend upward from the substrate surface, the patent creates a three-dimensional capacitor structure. This vertical dimension provides additional capacitance without consuming horizontal pixel region area, enabling high pixel array density while maintaining adequate capacitance values in each pixel.
Solution Approach 2:
The capacitor structure is nested within the pixel region by forming electrodes that extend vertically from the substrate surface and are surrounded by inter-level dielectric structures. This nested configuration allows the capacitor to be integrated within the existing pixel architecture without requiring additional lateral space.
3Quantity of substance
If larger capacitor area is provided to maintain capacitance, then capacitance density improves, but pixel region footprint increases
Solution Approach 1:
The patent resolves this contradiction by extending electrodes vertically from the substrate surface and forming dielectric layers around these vertical structures. This 3D configuration increases the effective capacitor area and capacitance while maintaining a compact footprint within the pixel region, as the capacitance-generating structure extends in the vertical dimension rather than requiring additional horizontal area.
Data Source
AI summary
The present disclosure relates to an image sensor integrated chip (IC) structure. The image sensor IC structure includes a plurality of image sensing elements respectively disposed within a plurality of pixel regions of a pixel array within a substrate. An inter-level dielectric (ILD) structure is disposed on a surface of the substrate and surrounds one or more interconnects. A plurality of three-dimensional (3D) capacitors are arranged within respective ones of the plurality of pixel regions and are coupled to one of the plurality of image sensing elements by the one or more interconnects. The plurality of 3D capacitors include a base region extending in parallel to the surface of the substrate and one or more fingers extending outward from the base region along a direction perpendicular to the surface of the substrate.