3D Reference Memory Sensing for PVT-Stable High-Density Arrays

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Solution Overview

Problem

High voltage sensing circuits are required for reliable operation in high density memory due to variations in process, voltage, and temperature (PVT) conditions, which are incompatible with modern memory technologies, and bandgap reference circuits are not immune to these variations.

Innovation Solution

A 3D memory architecture with a reference memory system that generates a reference signal using a group of memory cells, connected through conversion circuitry, and includes compensation capacitors to match capacitance, allowing for improved sensing margins by averaging noise and maintaining PVT conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional sensing circuits are used in high density memory, then the memory can operate at standard voltages, but the sensing margins become insufficient due to PVT variations

Engineering Contradiction:
Improvesensing marginVSAvoidsensing circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A reference cell is introduced as an intermediary element that experiences the same PVT conditions as the data cells. The reference cell generates a reference current that serves as a dynamic benchmark for comparison, allowing the sensing circuit to compensate for PVT variations without requiring high voltage operation or complex sensing architecture

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The reference current is dynamically adjusted to track PVT conditions by programming the reference cell's threshold voltage to match the average threshold voltage of the data cells under current operating conditions. This parameter adaptation enables the sensing circuit to maintain adequate sensing margins across varying temperature, voltage, and process conditions

Inventive Principle:
Principle #35Parameter changes

2Reliability

If high voltage sensing circuits are used to compensate for PVT variations, then sensing margins improve, but compatibility with modern memory technologies decreases

Engineering Contradiction:
Improvesensing marginVSAvoidcompatibility with modern technologies
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

A reference cell is created as a copy of the data cell structure, experiencing identical PVT conditions. This reference copy generates a corresponding reference current that can be used for comparison without requiring high voltage operation, enabling modern low-voltage memory technologies to achieve adequate sensing margins through differential measurement

Inventive Principle:
Principle #26Copying

3Device complexity

If a single reference current is used for all memory regions, then the reference circuit is simple, but sensing accuracy decreases for regions with different PVT conditions

Engineering Contradiction:
Improvereference circuit complexityVSAvoidsensing accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The memory array is divided into multiple regions, with each region having its own dedicated reference cell. This segmentation allows each reference cell to accurately track the PVT conditions specific to its region, providing locally-optimized reference currents that improve sensing accuracy across the entire memory array without requiring overly complex global reference circuitry

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP4116981B1High density memory with reference cell and corresponding operations
Publication Date: 2026.05.06 MACRONIX INTERNATIONAL CO LTD
  • EP4116981B1 patent drawingFigure 1
  • EP4116981B1 patent drawingFigure 2
  • EP4116981B1 patent drawingFigure 3~5

AI summary

A memory device includes a 3D data memory and a 3D reference memory. The reference memory is used to generate a reference signal used to sense data in the data memory. Conversion circuitry converts signals from a group of memory cells in the reference memory into a reference signal. The reference signal is applied to a sense amplifier to sense data stored in a selected memory cell in the data memory.