3D Resistive Memory Structure With Schottky Isolation Between Cells
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Solution Overview
Problem
Current resistance change memory devices face challenges in increasing integration density and reducing interference between memory cells, which affects their operational efficiency and storage capacity.
Innovation Solution
The memory device incorporates a three-dimensional structure with a specific configuration of conductor layers, semiconductor films, and resistance change films, where the semiconductor film is disposed apart from the conductor layer, and the resistance change film is provided on the side opposite to the semiconductor film, allowing for parallel connection of switching and resistance change elements, reducing interference and enhancing integration density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are arranged in a three-dimensional structure to increase integration density, then integration capacity is improved, but interference between adjacent memory cells increases
Solution Approach 1:
The memory cell structure is segmented into distinct functional regions: a first region containing the resistance change film for data storage, and a second region containing the Schottky barrier transistor for signal control. This spatial segmentation allows the memory cell to achieve high integration density while the separation between functional regions minimizes interference between adjacent cells, as each cell operates independently within its defined structure.
2Quantity of substance
If resistance change films are placed in close proximity to increase capacity, then integration is improved, but operational reliability deteriorates due to increased interference
Solution Approach 1:
The Schottky barrier transistor functions as an intermediary element between the resistance change film and the external circuit. It controls the flow of read/write signals through the resistance change film, enabling selective access to individual memory cells. This intermediary structure allows memory cells to be placed in close proximity for high capacity while maintaining operational reliability through controlled signal isolation.
3Ease of manufacture
If conventional memory cell structures are used to simplify manufacturing, then ease of manufacture is improved, but switching efficiency and current flow characteristics deteriorate
Solution Approach 1:
The memory cell employs a Schottky barrier transistor with specifically optimized parameters: a barrier height of 0.3-0.7 eV and a channel width 1.5-3 times the channel length. These parameter changes enable efficient switching characteristics and high current flow capability. The structure maintains manufacturing feasibility by using standard semiconductor fabrication processes while achieving superior electrical performance through precise parameter control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables increased integration density and improved operational characteristics by reducing interference between memory cells, allowing for efficient write and read operations with lower power consumption and higher storage capacity.
Implementation Method 1
a second conductivity type semiconductor film (a channel) that has a Schottky barrier with the first conductor layer
Data Source
AI summary
According to one embodiment, a memory device includes a first conductor layer and a second conductor layer spaced apart from each other in a first direction, a first semiconductor film spaced from the first conductor layer in a second direction intersecting the first direction, and a second semiconductor film spaced from the second conductor layer in the second direction. The first semiconductor film is between a first resistance change film and the first conductor layer in the second direction. The second semiconductor film is between a second resistance change film and the second conductor layer in the second direction. A first conductor film has a first end contacting the first semiconductor film and the first resistance change film and a second end contacting the second semiconductor film and the second resistance change film.