3D Semiconductor Memory Vertical Stacking Integration
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Solution Overview
Problem
Two-dimensional semiconductor devices face limitations in integration due to the expense of fine pattern forming technologies, which restricts their ability to meet consumer demands for high performance and low cost, prompting the development of three-dimensional semiconductor memory devices with higher reliability and density.
Innovation Solution
A three-dimensional semiconductor memory device is designed with a substrate, alternating stacks of insulating and conductive electrode patterns, vertical channel structures, and data storing patterns that extend between the electrode stack and substrate, featuring specific thickness relationships and protection insulating patterns to enhance integration and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If two-dimensional or planar semiconductor devices are used, then manufacturing process is simpler, but integration density is limited due to area constraints and fine pattern forming costs
Solution Approach 1:
The patent transitions from two-dimensional planar semiconductor devices to three-dimensional vertically stacked structures. Multiple electrode patterns and insulating patterns are stacked in the vertical direction to form a multi-layer configuration, thereby increasing integration density without requiring finer lateral patterning. This dimensional change allows higher capacity while maintaining manufacturing feasibility.
2Quantity of substance
If three-dimensional stacked structures are implemented, then integration density increases, but manufacturing complexity increases due to multiple patterning and stacking processes
Solution Approach 1:
The three-dimensional structure is segmented into multiple distinct layers including first electrode patterns, second electrode patterns, first insulating patterns, and second insulating patterns. Each layer can be formed and processed relatively independently, allowing the complex three-dimensional structure to be built through sequential simpler steps rather than attempting to form the entire structure simultaneously.
Solution Approach 2:
The first electrode patterns and first insulating patterns are formed in advance before forming the second electrode patterns and second insulating patterns. This preliminary action allows subsequent layers to be built upon established structures, simplifying the overall manufacturing process by breaking down the complex three-dimensional formation into sequential preparatory steps.
3Reliability
If vertical channel structures extend through the electrode stack, then electrical contact efficiency improves, but structural complexity and insulation requirements increase
Solution Approach 1:
Insulating patterns are introduced as intermediary elements between the vertical channel structures and the electrode patterns. These insulating patterns prevent unwanted electrical contact between adjacent conductive elements while allowing the vertical channels to extend through multiple layers, thereby managing structural complexity through controlled electrical isolation.
4Reliability
If data storing patterns extend into recesses formed by lower insulating patterns, then electrical insulation and contact efficiency improve, but manufacturing precision requirements increase
Solution Approach 1:
The lower insulating patterns are formed in advance to define recesses before the data storing patterns are formed. This preliminary action creates pre-defined spaces that guide the subsequent formation of data storing patterns, ensuring proper positioning and thickness control without requiring extremely high precision in a single step process.
Data Source
AI summary
A three-dimensional semiconductor memory device includes a stack on a substrate including electrodes vertically stacked on a substrate, lower insulating patterns disposed between the stack and the substrate, the lower insulating patterns being adjacent to both sidewalls of the stack and being spaced apart from each other, a plurality of vertical structures penetrating the stack and being connected to the substrate, and a data storing pattern between the stack and the vertical structures, the data storing pattern including a portion disposed between the lowermost one of the electrodes and the substrate.