3D Semiconductor Assembly With Passthrough Columns for Heat Separation
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Solution Overview
Problem
Manufacturers face challenges in reducing the space occupied by semiconductor devices while increasing capacity and speed of operation, particularly in processing applications where interconnections and power supplies generate significant heat, leading to excessive heat exposure.
Innovation Solution
The semiconductor device assemblies stack intermediary devices vertically between a processing device and an assembly substrate, utilizing passthrough conductive columns and direct electric communications to reduce signaling distances, eliminate unnecessary interconnections, and separate the processing device from heat sources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If semiconductor devices are stacked vertically with intermediary devices, then the assembly footprint is reduced and signaling distance is decreased, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent transitions from a planar lateral arrangement of semiconductor devices to a vertical three-dimensional stacking configuration. Intermediary devices are positioned between the processing device and assembly substrate in the vertical dimension, enabling direct electric communication through conductive columns that pass through the intermediary devices. This dimensional change reduces the assembly footprint by eliminating the need for lateral interconnection traces while maintaining functional connectivity.
Solution Approach 2:
Intermediary semiconductor devices are introduced as mediator components between the processing device and the assembly substrate. These intermediary devices contain passthrough conductive columns that provide direct electrical pathways through them, enabling the processing device to communicate with the substrate without lateral traces. The intermediary devices act as structural and electrical mediators that enable vertical integration while managing heat distribution.
2Area of stationary object
If processing devices are placed close to memory devices for compact assembly, then space is reduced, but heat exposure to memory devices increases
Solution Approach 1:
Intermediary semiconductor devices serve as thermal mediators positioned between the heat-generating processing device and the heat-sensitive memory devices on the assembly substrate. These intermediary devices contain passthrough conductive columns that provide electrical connectivity while their physical presence and thermal mass help distribute and manage heat flow, reducing peak heat exposure to components on the substrate.
Solution Approach 2:
The patent uses vertical stacking to separate heat sources from heat-sensitive components in the vertical dimension rather than relying on lateral spacing. The processing device is positioned at the top of the stack, intermediary devices in the middle, and memory devices on the substrate at the bottom, creating vertical thermal management zones that reduce harmful heat exposure while maintaining compact footprint.
3Ease of manufacture
If lateral interconnections are used between processing devices and memory devices, then manufacturing is simpler, but the assembly footprint increases
Solution Approach 1:
The patent replaces lateral interconnection traces in the horizontal plane with vertical conductive columns that pass through intermediary devices. This vertical pathway eliminates the need for complex lateral routing on the assembly substrate, simplifying the manufacturing process by reducing trace complexity while simultaneously minimizing the assembly footprint through three-dimensional integration.
4Speed
If more intermediary devices are stacked vertically, then signaling distance is reduced and heat is separated, but manufacturing precision requirements increase
Solution Approach 1:
The vertical stack is segmented into discrete intermediary device layers, each containing bond pads and conductive columns. This segmentation allows for modular assembly where each intermediary device can be independently positioned and bonded to adjacent layers. The bond pads on opposing surfaces of each intermediary device provide alignment features that facilitate precise stacking while maintaining manageable manufacturing tolerances through repeated two-dimensional bonding operations rather than single complex multi-layer alignment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the assembly footprint by up to 50%, decreases material costs, and effectively separates the processing device from heat sources, improving signaling and reducing heat exposure.
Implementation Method 1
Each of the intermediary semiconductor devices can include a memory array, a first bond pad, a second bond pad, and a conductive column. The first bond pad can electrically couple the assembly substrate to the intermediary semiconductor device; the second bond pad can electrically couple the top semiconductor device to the intermediary semiconductor device; and the conductive column can extend from and electrically couple the first bond pad to the second bond pad
Data Source
AI summary
A semiconductor device assembly can include an assembly substrate having a top surface, a top semiconductor device having a bottom surface, and a plurality of intermediary semiconductor devices. Each of intermediary semiconductor device can be bonded to both the assembly substrate top surface and the top device bottom surface. Each intermediary semiconductor device can also include a semiconductor substrate, a memory array, a first bond pad, a second bond pad, and a conductive column. The first bond pad can electrically couple the assembly substrate to the intermediary semiconductor device; the second bond pad can electrically couple the top semiconductor device to the intermediary semiconductor device; and the conductive column can electrically couple the first bond pad to the second bond pad, and can be exclusive of any electrical connection to the memory array.