3D Silicon Capacitor Trench Structure for High Density
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Solution Overview
Problem
Traditional multi-layer ceramic capacitors (MLCCs) fail to meet the demands of modern electronic systems for small volume and high capacity, limiting their ability to achieve high capacitance density and requiring complex and precise manufacturing processes.
Innovation Solution
A 3D silicon capacitor structure is developed with a semiconductor substrate featuring substrate trenches and laminated structures of conductive and dielectric layers, allowing for improved capacitance density without increasing process complexity by reducing alignment accuracy requirements and using a reusable manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional multi-layer ceramic capacitors (MLCC) are used, then the manufacturing process is complex and precise alignment is required, but the capacitance density is low and volume is large
Solution Approach 1:
The capacitor structure is segmented into substrate trenches and separate conductive layer trenches. The conductive layer trenches are formed independently in each conductive layer rather than requiring simultaneous alignment of multiple layers, which simplifies the manufacturing process and reduces alignment accuracy requirements while maintaining high capacitance density
Solution Approach 2:
The invention transitions from a planar capacitor structure to a three-dimensional structure with substrate trenches and vertically stacked conductive layers. This dimensional change allows capacitance to be accumulated in the vertical direction, achieving high capacitance density without requiring complex lateral alignment of multiple layers
2Manufacturing precision
If traditional MLCC structure is used, then the manufacturing process requires high alignment accuracy, but the capacitance density cannot be increased
Solution Approach 1:
The capacitor structure transitions to three-dimensional stacking with substrate trenches and vertically arranged conductive layers. This allows capacitance to be accumulated in the vertical dimension, achieving high capacitance density without requiring high lateral alignment accuracy between layers
Solution Approach 2:
The conductive layer trenches are nested within the substrate trench structure, with each conductive layer containing its own trench group. This nested arrangement allows multiple capacitive elements to be packed within the same footprint area, increasing capacitance density without requiring precise alignment between separate structures
3Quantity of substance
If the number of conductive layers is increased to improve capacitance density, then the alignment complexity and manufacturing difficulty increase
Solution Approach 1:
Each conductive layer is processed independently with its own trench formation step. This segmentation allows the number of conductive layers to be increased without proportionally increasing alignment complexity, as each layer can be manufactured and aligned to the substrate trench rather than to previous conductive layers
Solution Approach 2:
The capacitor structure utilizes vertical stacking of conductive layers within substrate trenches. This three-dimensional arrangement increases capacitance density by utilizing the vertical dimension, while the alignment reference remains the substrate trench footprint, preventing alignment complexity from increasing with the number of layers
Data Source
AI summary
A capacitor includes: a semiconductor substrate including at least one substrate trench group; at least one laminated structure, each laminated structure includes n conductive layers and m dielectric layers, the first conductive layer in the n conductive layers is disposed above the semiconductor substrate and in the substrate trench group, the i-th conductive layer in the n conductive layers is provided with the i-th conductive layer trench group, and the (i+1)th conductive layer in the n conductive layers is disposed above the i-th conductive layer and in the i-th conductive layer trench group, where m, n, and i are positive integers, and n≥2, 1≤i≤n−1; a first external electrode connected to some conductive layers; and a second external electrode connected to other conductive layers.