3D Source Contact Structure for Low-Capacitance Power Rail ICs

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Solution Overview

Problem

The semiconductor industry faces challenges in scaling transistor devices due to increased contact resistance and parasitic capacitance as feature sizes decrease, leading to complex manufacturing processes and reduced operating speeds.

Innovation Solution

The introduction of structural features for source contacts in integrated circuit devices that reduce parasitic capacitance and contact resistance, allowing for increased operating speeds while relaxing critical dimension and process window requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If feature size is reduced to increase integration density, then functional density is improved, but contact resistance and parasitic capacitance increase

Engineering Contradiction:
Improveintegration densityVSAvoidcontact resistance
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The source contact is configured with a lateral portion extending in the first direction and a vertical portion extending in the second direction, creating a three-dimensional structure. This dimensional transition increases the contact area with the power supply line without increasing the footprint area, thereby reducing contact resistance while maintaining integration density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The vertical portion of the source contact extends along the sidewall of the source feature and physically contacts the power supply line, nesting the contact structure within the existing device architecture. This nested configuration reduces parasitic capacitance by minimizing the contact's exposure to surrounding electric fields while maintaining electrical connection.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Quantity of substance

If feature size is reduced to increase integration density, then functional density is improved, but parasitic capacitance increases

Engineering Contradiction:
Improveintegration densityVSAvoidparasitic capacitance
Core Design Contradiction:
Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

By transitioning from a planar to a three-dimensional contact structure with lateral and vertical portions, the invention reduces the horizontal footprint of the source contact. This dimensional change decreases the overlap area with adjacent drain contacts, thereby reducing parasitic capacitance while maintaining integration density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The vertical portion of the source contact acts as an intermediary structure that extends along the sidewall of the source feature to physically contact the power supply line. This intermediary configuration minimizes the contact's exposure to adjacent electric fields, reducing parasitic capacitance effects.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If conventional source contact structures are used, then manufacturing process is simple, but critical dimension requirements and process window constraints increase complexity

Engineering Contradiction:
Improveprocess simplicityVSAvoidcritical dimension requirements
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The lateral portion of the source contact is formed to extend beyond the source feature in the first direction before the formation of the power supply line. This preliminary configuration ensures that the subsequent vertical portion can be formed to physically contact the power supply line, relaxing critical dimension requirements by providing a built-in alignment reference.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The source contact is divided into two distinct portions: a lateral portion extending in the first direction and a vertical portion extending in the second direction. This segmentation allows each portion to be optimized independently for its specific function, simplifying the overall manufacturing process by reducing interdependencies and process window constraints.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240387530A1Integrated circuit device including a power supply line and method of forming the same
Publication Date: 2024.11.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240387530A1 patent drawing
  • US20240387530A1 patent drawing
  • US20240387530A1 patent drawing

AI summary

A device includes a first semiconductor strip and a second semiconductor strip extending longitudinally in a first direction, where the first semiconductor strip and the second semiconductor strip are spaced apart from each other in a second direction. The device also includes a power supply line located between the first semiconductor strip and the second semiconductor strip. A top surface of the power supply line is recessed in comparison to a top surface of the first semiconductor strip. A source feature is disposed on a source region of the first semiconductor strip, and a source contact electrically couples the source feature to the power supply line. The source contact includes a lateral portion contacting a top surface of the source feature, and a vertical portion extending along a sidewall of the source feature towards the power supply line to physically contact the power supply line.